Physical principles of memory and logic devices based on nanostructured Dirac materials

During the las decades, the silicon-based semiconductor industry has enabled higher performance per cost of integrated circuits due to the ability of nearly doubling the amount of transistors per chip every two years, however, this has resulted in overheating issues and fundamental manufacturing problems that are very di¿cult to solve. Therefore, Dirac materials (DMs), such as graphene and topological insulators (TIs), are being extensively investigated as possible candidates for replacing silicon-channel devices in the next-generation integrated circuits, due to their attractive ultrahigh carrier mobility and possibility of quantum e¿ects that may be useful for electronic applications. This requires to study the physical principles of such nanostructures to e¿ectivelypredictthequantumtransportbehaviorofpossibledevices. Theaimofthis work is to explore the physical properties of Dirac material-based nanostructures that could be used for novel memory and logic devices, by using tight-binding (TB) and density function theory (DFT) methods combined with the non-equilibrium function (NEGF) formulationDoctoradoDOCTOR(A) EN INGENIERÍA ELECTRICA Y ELECTRÓNIC

Review on graphene nanoribbon devices for logic applications

Abstract: Graphene nanoribbon (GNR) devices are being extensively investigated as possible candidates for replacing silicon-channel devices in the next-generation integrated circuits and systems, due to their attractive physical properties for electronic applications. This requires to implement complete models to effectively predict the electronic transport behavior of the device, which should be modeled in circuit level simulators before reaching commercial production. Different methods for electronic transport simulations in nanoelectronic devices have been studied, comprising first-principle, empirical, semiempirical and analytical. They can be used according to the complexity of the device, and the number of atoms and inter-atomic interactions that need to be considered. This work summarizes the methods and models used to characterize and simulate nanoelectronic devices. Additionally, we review the properties of GNRs, defect issues and the most recent approaches and manufacturing techniques that could be used to design GNR-based logic circuits. Resumen: Los dispositivos basados en Nanocintas de Grafeno son objeto extensivo de investigación como posibles candidatos para reemplazar a los dispositivos con canal de silicio en la próxima generación de circuitos y sistemas, debido a sus atractivas propiedades físicas para aplicaciones electrónicas. Esto requiere implementar modelos completos que permitan predecir el transporte electrónico del dispositivo, que debería ser modelado en un simulador a nivel de circuito antes de alcanzar producción comercial. Distintos métodos para simulaciones de transporte electrónico en dispositivos nanoelectrónicos han sido estudiados, comprendiendo primeros-principios, empíricos, semiempíricos y analíticos. Estos pueden ser usados según la complejidad del dispositivo y el número de átomos e interacciones inter-atómicas que necesiten ser consideradas. Este trabajo resume los métodos y modelos usados para caracterizar y simular dispositivos nanoelectrónicos. Adicionalmente, revisamos las propiedades de las Nanocintas de Grafeno, defectos y las técnicas de fabricación recientes que podrían ser usadas para diseñar circuitos lógicos basados en Nanocintas de Grafeno