33 research outputs found

    Gingelom, Montenakenstraat, 14. Eindverslag van een archeologisch onderzoek met het oog op wetenschappelijke vraagstelling.

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    Dhr. Patrice Taber-Seer meldde de vondst van munten op zijn eigendom op 18/10/2019. Op basis van de stratigrafie van het terrein kan duidelijk en ontegensprekelijk worden aangetoond dat de kuil niet de originele locatie van de muntschat is

    Gingelom, Montenakenstraat. Archeologierapport van een archeologisch onderzoek met het oog op wetenschappelijke vraagstelling

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    Op vrijdag 18/10/2019 meldde Dhr. Patrice Taber-Seer de vondst van munten op zijn eigendom in Gingelom via het mailadres van de CAI (Centrale Archeologische Inventaris). In zijn mail schreef hij ook dat hij de munten met de metaaldetector had aangetroffen op donderdag 17/10/2019 en op vrijdag 18/10/2019 op zoek naar metalen voorwerpen die hij van zijn terrein wenste te verwijderen. Hij legde verder uit dat hij in de loop van september via mail aan het agentschap gevraagd had of hij de talrijke metalen voorwerpen van zijn terrein mocht verwijderen met de detector ten einde zijn terrein te saneren van metalen. Hij voegt een foto toe met een handvol munten. Eén van de munten is duidelijk herkenbaar als een Antoninianus1

    The 2018 GaN power electronics roadmap

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    Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

    Dry oxidation mechanisms of copper in trenches

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    The effect of trace oxygen on the annealing of Cu/Ta(N)/SiO2/Si(001) damascene structures was studied. The dry oxidation of copper was investigated by annealing the wafers at 420 °C for 20 min in N2 ambients with oxygen concentrations ranging from 0 to 2500 ppm in a Rapid Thermal Processing (RTP) system. Electron Backscattered Diffraction (EBSD) mapping (also called 'Orientation Imaging Microscopy' (OIM)) and high resolution Scanning Electron Microscopy (SEM) were used to determine the structure, texture and chemical composition of the annealed copper. For low oxygen contents, the oxidation of the surface in bonding areas is initiated at the grain boundaries and on (1 1 1) oriented grains. The oxidation is selective and depends on the segregation of sulphur at the surface of grains with a specific orientation. For higher oxygen concentrations, the oxidation occurs readily and is dependent on the trench geometry, increasing with decreasing line width. In this case, the dimensions, the distribution of impurities in the trenches, and the microstructure of the copper modify the oxidation rate in the small features. © 2002 Elsevier Science B.V. All rights reserved.status: publishe

    Investigation on carrier transport through AIN nucleation layer from differently doped Si(111) substrates

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    To get a better insight into the vertical leakage mechanism of GaN-on-Si, the carrier transport from n(+), n, p(+), and p-Si(111) substrates through the AIN nucleation layer was investigated. A plateau in the current-voltage curve was found only for the AIN/p-Si heterojunction due to depletion of the p-Si substrate. Detailed study illustrated that it was the leaky AIN that cannot effectively block the increasing amount of electrons in the inversion layer at the interface and triggered the depletion. Temperature-dependent characterization suggested that the forward vertical leakage mechanism of AIN/Si could be explained sequentially by Ohm's law, space-charge-limited conduction, variable-range hopping, and trap-assisted tunneling. A model involving shallow donor traps, interface traps, and deep level traps was proposed to explain the leakage characteristics. This paper shows that the carrier concentration of the Si substrates strongly impacts the vertical leakage characteristics, and also that the carrier transport from the Si substrate through the AIN nucleation layer is heavily influenced by traps

    Investigation on Carrier Transport Through AIN Nucleation Layer From Differently Doped Si(111) Substrates

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    © 1963-2012 IEEE. To get a better insight into the vertical leakage mechanism of GaN-on-Si, the carrier transport from n+, n, p+, and p-Si(111) substrates through the AlN nucleation layer was investigated. A plateau in the current-voltage curve was found only for the AlN/p-Si heterojunction due to depletion of the p-Si substrate. Detailed study illustrated that it was the leaky AlN that cannot effectively block the increasing amount of electrons in the inversion layer at the interface and triggered the depletion. Temperature-dependent characterization suggested that the forward vertical leakage mechanism of AlN/Si could be explained sequentially by Ohm's law, space-charge-limited conduction, variable-range hopping, and trap-assisted tunneling. A model involving shallow donor traps, interface traps, and deep level traps was proposed to explain the leakage characteristics. This paper shows that the carrier concentration of the Si substrates strongly impacts the vertical leakage characteristics, and also that the carrier transport from the Si substrate through the AlN nucleation layer is heavily influenced by traps.status: publishe

    200 V enhancement-mode p-GaN HEMTs fabricated on 200 mm GaN-on-SOI with trench isolation for monolithic integration

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    © 2017 IEEE. Monolithic integration of a half bridge on the same GaN-on-Si wafer is very challenging because the devices share a common conductive Si substrate. In this letter, we propose to use GaN-on-SOI (siliconon- insulator) to isolate the devices by trench etching through the GaN/Si(111) layers and stopping in the SiO2 buried layer. By well-controlled epitaxy and device fabrication, high-performance 200 V enhancement-mode (e-mode) p-GaN high electronmobility transistors with a gatewidth of 36 mm are achieved. This letter demonstrates that by using GaN-on-SOI in combination with trench isolation, it is very promising to monolithically integrate GaN power systems on the same wafer to reduce the parasitic inductance and die size.status: publishe
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