21 research outputs found

    Global incidence, prevalence, years lived with disability (YLDs), disability-adjusted life-years (DALYs), and healthy life expectancy (HALE) for 371 diseases and injuries in 204 countries and territories and 811 subnational locations, 1990–2021: a systematic analysis for the Global Burden of Disease Study 2021

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    Background: Detailed, comprehensive, and timely reporting on population health by underlying causes of disability and premature death is crucial to understanding and responding to complex patterns of disease and injury burden over time and across age groups, sexes, and locations. The availability of disease burden estimates can promote evidence-based interventions that enable public health researchers, policy makers, and other professionals to implement strategies that can mitigate diseases. It can also facilitate more rigorous monitoring of progress towards national and international health targets, such as the Sustainable Development Goals. For three decades, the Global Burden of Diseases, Injuries, and Risk Factors Study (GBD) has filled that need. A global network of collaborators contributed to the production of GBD 2021 by providing, reviewing, and analysing all available data. GBD estimates are updated routinely with additional data and refined analytical methods. GBD 2021 presents, for the first time, estimates of health loss due to the COVID-19 pandemic. Methods: The GBD 2021 disease and injury burden analysis estimated years lived with disability (YLDs), years of life lost (YLLs), disability-adjusted life-years (DALYs), and healthy life expectancy (HALE) for 371 diseases and injuries using 100 983 data sources. Data were extracted from vital registration systems, verbal autopsies, censuses, household surveys, disease-specific registries, health service contact data, and other sources. YLDs were calculated by multiplying cause-age-sex-location-year-specific prevalence of sequelae by their respective disability weights, for each disease and injury. YLLs were calculated by multiplying cause-age-sex-location-year-specific deaths by the standard life expectancy at the age that death occurred. DALYs were calculated by summing YLDs and YLLs. HALE estimates were produced using YLDs per capita and age-specific mortality rates by location, age, sex, year, and cause. 95% uncertainty intervals (UIs) were generated for all final estimates as the 2·5th and 97·5th percentiles values of 500 draws. Uncertainty was propagated at each step of the estimation process. Counts and age-standardised rates were calculated globally, for seven super-regions, 21 regions, 204 countries and territories (including 21 countries with subnational locations), and 811 subnational locations, from 1990 to 2021. Here we report data for 2010 to 2021 to highlight trends in disease burden over the past decade and through the first 2 years of the COVID-19 pandemic. Findings: Global DALYs increased from 2·63 billion (95% UI 2·44–2·85) in 2010 to 2·88 billion (2·64–3·15) in 2021 for all causes combined. Much of this increase in the number of DALYs was due to population growth and ageing, as indicated by a decrease in global age-standardised all-cause DALY rates of 14·2% (95% UI 10·7–17·3) between 2010 and 2019. Notably, however, this decrease in rates reversed during the first 2 years of the COVID-19 pandemic, with increases in global age-standardised all-cause DALY rates since 2019 of 4·1% (1·8–6·3) in 2020 and 7·2% (4·7–10·0) in 2021. In 2021, COVID-19 was the leading cause of DALYs globally (212·0 million [198·0–234·5] DALYs), followed by ischaemic heart disease (188·3 million [176·7–198·3]), neonatal disorders (186·3 million [162·3–214·9]), and stroke (160·4 million [148·0–171·7]). However, notable health gains were seen among other leading communicable, maternal, neonatal, and nutritional (CMNN) diseases. Globally between 2010 and 2021, the age-standardised DALY rates for HIV/AIDS decreased by 47·8% (43·3–51·7) and for diarrhoeal diseases decreased by 47·0% (39·9–52·9). Non-communicable diseases contributed 1·73 billion (95% UI 1·54–1·94) DALYs in 2021, with a decrease in age-standardised DALY rates since 2010 of 6·4% (95% UI 3·5–9·5). Between 2010 and 2021, among the 25 leading Level 3 causes, age-standardised DALY rates increased most substantially for anxiety disorders (16·7% [14·0–19·8]), depressive disorders (16·4% [11·9–21·3]), and diabetes (14·0% [10·0–17·4]). Age-standardised DALY rates due to injuries decreased globally by 24·0% (20·7–27·2) between 2010 and 2021, although improvements were not uniform across locations, ages, and sexes. Globally, HALE at birth improved slightly, from 61·3 years (58·6–63·6) in 2010 to 62·2 years (59·4–64·7) in 2021. However, despite this overall increase, HALE decreased by 2·2% (1·6–2·9) between 2019 and 2021. Interpretation: Putting the COVID-19 pandemic in the context of a mutually exclusive and collectively exhaustive list of causes of health loss is crucial to understanding its impact and ensuring that health funding and policy address needs at both local and global levels through cost-effective and evidence-based interventions. A global epidemiological transition remains underway. Our findings suggest that prioritising non-communicable disease prevention and treatment policies, as well as strengthening health systems, continues to be crucially important. The progress on reducing the burden of CMNN diseases must not stall; although global trends are improving, the burden of CMNN diseases remains unacceptably high. Evidence-based interventions will help save the lives of young children and mothers and improve the overall health and economic conditions of societies across the world. Governments and multilateral organisations should prioritise pandemic preparedness planning alongside efforts to reduce the burden of diseases and injuries that will strain resources in the coming decades. Funding: Bill & Melinda Gates Foundation

    Global, regional, and national burden of disorders affecting the nervous system, 1990–2021: a systematic analysis for the Global Burden of Disease Study 2021

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    BackgroundDisorders affecting the nervous system are diverse and include neurodevelopmental disorders, late-life neurodegeneration, and newly emergent conditions, such as cognitive impairment following COVID-19. Previous publications from the Global Burden of Disease, Injuries, and Risk Factor Study estimated the burden of 15 neurological conditions in 2015 and 2016, but these analyses did not include neurodevelopmental disorders, as defined by the International Classification of Diseases (ICD)-11, or a subset of cases of congenital, neonatal, and infectious conditions that cause neurological damage. Here, we estimate nervous system health loss caused by 37 unique conditions and their associated risk factors globally, regionally, and nationally from 1990 to 2021.MethodsWe estimated mortality, prevalence, years lived with disability (YLDs), years of life lost (YLLs), and disability-adjusted life-years (DALYs), with corresponding 95% uncertainty intervals (UIs), by age and sex in 204 countries and territories, from 1990 to 2021. We included morbidity and deaths due to neurological conditions, for which health loss is directly due to damage to the CNS or peripheral nervous system. We also isolated neurological health loss from conditions for which nervous system morbidity is a consequence, but not the primary feature, including a subset of congenital conditions (ie, chromosomal anomalies and congenital birth defects), neonatal conditions (ie, jaundice, preterm birth, and sepsis), infectious diseases (ie, COVID-19, cystic echinococcosis, malaria, syphilis, and Zika virus disease), and diabetic neuropathy. By conducting a sequela-level analysis of the health outcomes for these conditions, only cases where nervous system damage occurred were included, and YLDs were recalculated to isolate the non-fatal burden directly attributable to nervous system health loss. A comorbidity correction was used to calculate total prevalence of all conditions that affect the nervous system combined.FindingsGlobally, the 37 conditions affecting the nervous system were collectively ranked as the leading group cause of DALYs in 2021 (443 million, 95% UI 378–521), affecting 3·40 billion (3·20–3·62) individuals (43·1%, 40·5–45·9 of the global population); global DALY counts attributed to these conditions increased by 18·2% (8·7–26·7) between 1990 and 2021. Age-standardised rates of deaths per 100 000 people attributed to these conditions decreased from 1990 to 2021 by 33·6% (27·6–38·8), and age-standardised rates of DALYs attributed to these conditions decreased by 27·0% (21·5–32·4). Age-standardised prevalence was almost stable, with a change of 1·5% (0·7–2·4). The ten conditions with the highest age-standardised DALYs in 2021 were stroke, neonatal encephalopathy, migraine, Alzheimer's disease and other dementias, diabetic neuropathy, meningitis, epilepsy, neurological complications due to preterm birth, autism spectrum disorder, and nervous system cancer.InterpretationAs the leading cause of overall disease burden in the world, with increasing global DALY counts, effective prevention, treatment, and rehabilitation strategies for disorders affecting the nervous system are needed

    CROSS-LAYER SYNTHESIS AND INTEGRATION METHODOLOGY OF WAVELENGTH-ROUTED OPTICAL NETWORKS-ON-CHIP FOR 3D-STACKED PARALLEL COMPUTING SYSTEM

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    In future high-performance computing systems, congruent multiples in GOPS/W are expected more from the improvement of system integration levels (such as 3D stacking or 2.5D integration) rather than from the scaling of device dimensions. The expected outcome will be large chip-scale multiprocessors that will pose unprecedented bandwidth requirements for intra and inter-die communications. In this context, system performance needs to be sustained by a scalable on-chip communication infrastructure capable of delivering large bandwidth capacities and stringent latency requirements in a power efficient fashion. By capitalizing on the latest advances of silicon photonics, optical networks-on-chip (ONoCs) stand out as a promising solution to overcome the interconnect limitations and enable the continued scaling of many-core architectures. With respect to traditional electronic NoCs, they preserve the chip-scale networking paradigm while changing the technology substrate. However, ONoCs currently suffer from a huge gap between device developers and system designers which prevents their "system ability", that is the capability to do system level design with them. A research investment on design automation and on system-level integration methods is the only way to bridge the abstraction gap and enable system designers to work out efficient solutions for the connectivity problem at hand. For this purpose, the thesis aims at improving the "system ability" of a specific family of ONoCs that holds promise of all-optical, predictable and low-latency communications, namely wavelength-routed ONoCs (WRONoCs). In this context, the thesis aims at addressing two correlated aspects of this abstraction gap: 1)On the one hand, the thesis will pursue cross-layer synthesis methodologies to enable the design space exploration and the specification of abstract solutions for the connectivity problem at hand, as well as their refinement into an actual physical structure. This represents a milestone contribution to shed light on a design space which is currently limited to the few topology design points that researchers' intuition was able to unveil. The enabling approach is to bring design automation beyond its electronic roots. 2)On the other hand, the thesis will investigate how to compose silicon nanophotonic networks with the other system-level components. This integration issue is typically overlooked in literature, since it is oversimplified as a stage of E/O and O/E conversion circuits. This thesis demonstrates that the interface of such networks to the electronic part of the system is much more complex than that, and implies a new multi-technology architecture building block that we call "the bridge", with major impact upon the network power budget and performance. In practice, an energy-efficient, low-latency and flexible bridge is designed to connect an ONoC with the baseline electronic NoC in a 3D-stacked parallel computing system. In addition to this, the configuration space of the bridge is explored in terms of aggregate connection data rate and bit-level parallelism in optics, in search for the most energy-efficient configuration for the bridge and for the network as a whole. To expand the configuration space, we add a unique technology optimization plane, where we consider two successive CMOS process nodes (40nm and 28nm) and a high-performance 130nm BiCMOS node. An interesting outcome of the thesis is the characterization of the trade-offs arising from the partitioning of the bridge among these technologies. To pursue the above goals, a systematic approach has been adopted that continuously correlates the design choices at the architectural and / or topological level with the corresponding effects in terms of layout efficiency, power consumption and performance.L’incremento delle prestazioni e dell’efficienza energetica dei futuri sistemi di elaborazione non sarà raggiunto solo tramite la tradizionale riduzione delle dimensioni dei dispositivi, ma soprattutto attraverso il miglioramento dei metodi di integrazione a livello sistema (come l’integrazione 2.5D o 3D). L’esito di questo trend saranno sistemi multiprocessore ad elevato parallelismo che richiederanno una banda altissima sia per le comunicazioni all’interno del chip sia per quelle tra il chip e l’esterno. In questo contesto, le prestazioni aggregate del sistema dovranno essere sostenute da un'infrastruttura di comunicazione scalabile a livello chip che sia in grado di fornire alte densità di banda, di estendersi alla comunicazione off-chip in modo trasparente, di ridurre la latenza ed il consumo energetico. Considerando i recenti progressi della fotonica del silicio, le reti di interconnessioni ottiche integrate (ONoCs) risultato la tecnologia più promettente per superare il collo di bottiglia della comunicazione e per continuare lo scaling delle architetture many-core esistenti. Rispetto alle tradizionali NoC elettroniche, le ONoCs preservano il paradigma del networking tra gli attori della comunicazione a livello chip, ma cambiano il substrato tecnologico. Tuttavia, le ONoCs attualmente soffrono di un enorme divario tra gli sviluppatori della tecnologia e i progettisti a livello sistema, che impedisce la loro "system-ability", ovvero la capacità di progettare a livello sistema utilizzando questa tecnologia emergente. Un investimento di ricerca sulla automazione della progettazione e sui metodi di integrazione a livello sistema è l'unico modo per colmare il divario e per consentire ai progettisti di fornire soluzioni efficienti e non-intuitive per i problemi di connettività che devono affrontare. A tal fine, la mia tesi di dottorato mira a migliorare la "system-ability" di una specifica famiglia di ONoC, ossia il wavelength-routed (WRONoCs). In particolare, la tesi affronta due aspetti correlati del divario: 1)Da un lato, la tesi persegue metodologie di sintesi ad elevata integrazione verticale per consentire l'esplorazione dello spazio di progetto e la specifica di soluzioni astratte per il problema di connettività sotto esame, oltre al loro raffinamento progressivo in strutture fisiche reali. Questo rappresenta un contributo fondamentale per conoscere uno spazio di progetto che è attualmente limitato ai pochi punti che l’intuizione dei ricercatori riesce a concepire. Ultimamente, questo approccio consiste nel portare la consolidata disciplina dell’automazione della progettazione oltre le sue radici elettroniche. 2)D'altro lato, la tesi studia il metodo di integrare le reti nanofotoniche al silicio con gli altri componenti a livello architetturale. Questo problema di integrazione “orizzontale” è tipicamente trascurato dalla letteratura scientifica, poiché è risolto in maniera semplicistica tramite uno stadio di circuiti di conversione da elettronica a ottica (E/O) e viceversa (O/E). Questa tesi dimostra che l'interfacciamento di tali reti con la parte elettronica del sistema è molto più complesso di questo modello semplificato, dal momento che richiede la progettazione di un nuovo blocco architetturale implementato mediante tecnologie potenzialmente eterogenee, e che ho chiamato " Bridge". Questo bridge in realtà ha un impatto significativo sul bilancio energetico e sulle prestazioni dell’intera rete ottica integrata. La mia tesi ha esplorato lo spazio delle configurazioni del bridge in un piano di ottimizzazione bidimensionale che include la velocità di trasmissione complessiva di un segnale ottico ed il livello di parallelismo dei dati su una connessione, con lo scopo di quantificare i trade-off performance-energia sia per il bridge sia per la rete completa

    Understanding the Design Space of Wavelength-Routed Optical NoC Topologies for Power-Performance Optimization

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    Silicon photonics is the most promising emerging technology to deliver on- and off-chip communication performance and power that vastly exceed the capabilities of electronics. However, a significant abstraction gap does exist between novel devices and circuits and the higher-order switching structures that system designers need to instantiate. Currently, designers mostly rely on their intuition to bridge this abstraction gap. This paper lays the groundwork for a more rigorous and effective approach, by vertically-integrating the most advanced design methods and tools for topology synthesis and refinement in the context of a novel performance analysis framework. As a result, we can extract the highest aggregate bandwidth out of an optical network-on-chip topology, and provide an early-stage analysis of its static power, thus unveiling unexplored portions of the design space and interpreting its characteristics

    Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems

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    The fundamental choice to be taken when sharing an optical ring between multiple communication actors is whether to avoid contention from the ground up by means of non-interfering concurrent transmissions on different wavelengths, or by resolving it at runtime through arbitration mechanisms.This paper aims at assessing power efficiency of Wavelength-Selective vs. Wavelength-Arbitrated routing methodologies on top of an optical ringfor photonically-integrated high-end embedded systems

    Exploring Communication Protocols for Optical Networks-on-Chip based on Ring Topologies

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    Previous studies report on the promising features of ring structures to serve as the interconnection backbone for optical networks-on-chip. This paper contrasts the power efficiency of Wavelength-Selective vs. Arbitrated Routing Methods with technology and layout awareness

    Contrasting Laser Power Requirements of Wavelength-Routed Optical NoC Topologies Subject to the Floorplanning, Placement, and Routing Constraints of a 3-D-Stacked System

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    A realistic assessment of optical networks-on-chip (ONoCs) can be performed only in the context of a comprehensive floorplanning strategy for the system as a whole, especially when the 3-D stacking of electronic and optical layers is implemented. This paper fosters layout-aware ONoC design by developing a physical mapping methodology for wavelength-routed ONoC topologies subject to the floorplanning, placement, and routing constraints that arise in a 3-D-stacked environment. As a result, this paper is able to compare the power efficiency and signal-to-noise ratio of ring-based versus filter-based wavelength-routed topologies as determined by their physical design flexibility

    Populating and exploring the design space of wavelength-routed optical network-on-chip topologies by leveraging the add-drop filtering primitive

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    Emerging technologies often carry different logic primitives for which contemporary logic synthesis techniques are not suitable. For this reason, the design space of circuit-level solutions relying on such technologies is often largely unexplored. One domain where this trend is evident consists of topologies for wavelength-routed optical networks-on-chip (WRONoCs). Current literature only reports isolated design points that are inspired only by the intuition of researchers: there are currently no methodologies that enable designers to populate the design space in a consistent way. As a result, the possibility of an automated synthesis flow guiding the designer to the most promising solution in the design space is far from coming. This paper aims at bridging the former gap by identifying the basic primitive which is at the core of each topology. Then, a methodology is consistently derived to combine basic primitives together, thus potentially yielding all points of the topology design space. To our knowledge, this is the first time the design space of wavelength-routed topologies is populated in a potentially exhaustive way through a systematic methodology. As a result, it becomes evident that for a specified quality metric, there exist better solutions than the topologies that have been found out so far by designers' intuition. This paper is thus the stepping stone for future work targeting automatic synthesis of WRONoC topologies

    Cost-effective and flexible asynchronous interconnect technology for GALS networks-on-chip

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    Fine-grained power management of largely-integrated manycore systems is becoming mainstream in order to deal with tight power budgets. As a result, some level of asynchrony is becoming inevitable for efficient system-level operation. Asynchronous interconnection networks naturally provide such asynchrony, however their wide industrial uptake depends on the capability to overcome two fundamental barriers: their area and dynamic power overhead as well as the limited computer-aided design (CAD) tool support for their automated design. This paper presents a novel design point (i.e., a switch architecture and a hierarchical synthesis toolflow for network assembly) for on-chip asynchronous communication, combining design flexibility with small footprint and cost effectiveness
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