Mapping Embedded Applications on MPSoCs: The MNEMEE Approach

As embedded systems are becoming the center of our digital life, system design becomes progressively harder. The integration of multiple features on devices with limited resources requires careful and exhaustive exploration of the design search space in order to efficiently map modern applications to an embedded multi-processor platform. The MNEMEE project addresses this challenge by offering a unique integrated tool flow that performs source-to-source transformations to automatically optimize the original source code and map it on the target platform. The optimizations aim at reducing the number of memory accesses and the required memory storage of both dynamically and statically allocated data. Furthermore, the MNEMEE tool flow performs optimal assignment of all data on the memory hierarchy of the target platform. Designers can use the whole flow or a part of it and integrate it into their own design flow. This paper gives an overview of the MNEMEE tool flow along. It also presents two industrial case studies that demonstrate who the techniques and tools developed in the MNEMEE project can be integrated into industrial design flows

Mapping embedded applications on MPSoCs : the MNEMEE approach

As embedded systems are becoming the center of our digital life, system design becomes progressively harder. The integration of multiple features on devices with limited resources requires careful and exhaustive exploration of the design search space in order to efficiently map modern applications to an embedded multi-processor platform. The MNEMEE project addresses this challenge by offering a unique integrated tool flow that performs source-to-source transformations to automatically optimize the original source code and map it on the target platform. The optimizations aim at reducing the number of memory accesses and the required memory storage of both dynamically and statically allocated data. Furthermore, the MNEMEE tool flow performs optimal assignment of all data on the memory hierarchy of the target platform. Designers can use the whole flow or a part of it and integrate it into their own design flow. This paper gives an overview of the MNEMEE tool flow along. It also presents two industrial case studies that demonstrate who the techniques and tools developed in the MNEMEE project can be integrated into industrial design flows

The MOSART Mapping Optimization for multi-core ARchiTectures ∗

MOSART project addresses two main challenges of prevailing architectures: (i) The global interconnect and memory bottleneck due to a single, globally shared memory with high access times and power consumption; (ii) The difficulties in programming heterogeneous, multi-core platforms MOSART aims to overcome these through a multi-core architecture with distributed memory organization, a Network-on-Chip (NoC) communication backbone and configurable processing cores that are scaled, optimized and customized together to achieve diverse energy, performance, cost and size requirements of different classes of applications. MOSART achieves this by: (i) Providing platform support for management of abstract data structures including middleware services and a run-time data manager for NoC based communication infrastructure; (ii) Developing tool support for parallelizing and mapping applications on the multi-core target platform and customizing the processing cores for the application.

5G-VICTORI: Future Railway Communications Requirements Driving 5G Deployments in Railways

The complete transformation of the ICT domain driven by 5G network principles and capabilities, will impact significantly the path towards digitalization of many vertical industries, with modern railway transportations being one of them. In this context, Future Railway Mobile Communication System (FRMCS) service requirements and system principles are very well mapped to 5G service and network concepts associated with network performance, technology neutrality at various levels as well as network planning and deployment options. However, the flexibility of 5G networks implies that concepts are pinned down to deployment paradigms so that afore assertions are proved. The 5G-PPP project 5G-VICTORI aims at delivering a complete 5G solution suitable for railway environments and FRMCS services, along with experimentation deployments for testing and evaluation in operational railway environments. This paper discusses the service Key Performance Indicators (KPIs) and technical requirements and provides an overview of the proposed experimental deployment in an operational railway environment in the area of Patras, Greece. © 2021, IFIP International Federation for Information Processing

5G-VICTORI: Future Railway Communications Requirements Driving 5G Deployments in Railways

The complete transformation of the ICT domain driven by 5G network principles and capabilities, will impact significantly the path towards digitalization of many vertical industries, with modern railway transportations being one of them. In this context, Future Railway Mobile Communication System (FRMCS) service requirements and system principles are very well mapped to 5G service and network concepts associated with network performance, technology neutrality at various levels as well as network planning and deployment options. However, the flexibility of 5G networks implies that concepts are pinned down to deployment paradigms so that afore assertions are proved. The 5G-PPP project 5G-VICTORI aims at delivering a complete 5G solution suitable for railway environments and FRMCS services, along with experimentation deployments for testing and evaluation in operational railway environments. This paper discusses the service Key Performance Indicators (KPIs) and technical requirements and provides an overview of the proposed experimental deployment in an operational railway environment in the area of Patras, Greece. © 2021, IFIP International Federation for Information Processing

Ultra-low latency 5G CHARISMA architecture for secure intelligent transportation verticals

We describe low end-to-end latencies of 6.69 ms in the 5G CHARISMA network, that has been optimised for both device and system technologies speed, as well as with its virtualised, hierarchical and distributed, edge-centric architecture, that processes data as near as possible to their source and destination. Such an ultra-high speed 5G network can be utilised in intelligent transport system (ITS) applications, and we describe a public transport bus-based use case that takes advantage of the CHARISMA capabilities

Terahertz technologies to deliver optical network quality of experience in wireless systems beyond 5G

Abstract This article discusses the basic system architecture for THz wireless links with bandwidths of more than 50 GHz into optical networks. New design principles and breakthrough technologies are required in order to demonstrate terabit- per-second data rates at near zero latency using the proposed system concept. Specifically, we present the concept of designing the baseband signal processing for both the optical and wireless links and using an E2E error correction approach for the combined link. We provide two possible electro-optical baseband interface architectures, namely transparent optical-link and digital- link architectures, which are currently under investigation. THz wireless link requirements are given as well as the main principles and research directions for the development of a new generation of transceiver front-ends that will be capable of operating at ultra-high spectral efficiency by employing higher-order modulation schemes. Moreover, we discuss the need for developing a novel THz network information theory framework, which will take into account the channel characteristics and the nature of interference in the THz band. Finally, we highlight the role of PBF, which is required in order to overcome the propagation losses, as well as the physical layer and medium access control challenges

CHARISMA: Converged heterogeneous advanced 5G cloud-RAN architecture for intelligent and secure media access

5G networks aims to tackle the complex demands of emerging business paradigms, such as Smart Cities, eHealth, and Industry 4.0. In this paper, a hierarchical, distributed-intelligence 5G architecture is described, offering low latency, security, and open access as features intrinsic to its design. SDN and NFV principles are employed to create a networking solution applicable to a large number of high-specification 5G use case scenarios

Hierarchical, virtualised and distributed intelligence 5G architecture for low-latency and secure applications

CHARISMA aims to tackle low‐latency and end‐to‐end security for converged fixed/wireless 5G networks in order to meet the complex demands of emerging business paradigms, such as Smart Cities, eHealth and Industry 4.0. In this paper, we present the key drivers and requirements towards a hierarchical, distributed‐intelligence 5G architecture, supporting low latency, security and open access as features intrinsic to its design. We also investigate the business perspective of the proposed 5G solution and the changes that can be foreseen for the telecom ecosystem