Transformer based front-end for a low power 2.4 GHz transceiver

A low power transceiver architecture for the 2.4 GHz ISM band using a 1.0 V supply is presented. It employs a transformer to convert the 100 Ω antenna impedance to almost 1 kΩ and so facilitates a low power transmitter and receiver. The simulated post-layout output power of the differential class-E power amplifier is 2.0 dBm with a drain efficiency of 28.4%. The direct-conversion receiver achieves a very low power consumption of 420 μW and a noise figure of 15.0 dB.Ministerio de Ciencia e Innovación TEC2009-08447Junta de Andalucía TIC-0281

A 64-channel inductively-powered neural recording sensor array

This paper reports a 64-channel inductively powered neural recording sensor array. Neural signals are acquired, filtered, digitized and compressed in the channels. Additionally, each channel implements a local auto-calibration mechanism which configures the transfer characteristics of the recording site. The system has two operation modes; in one case the information captured by the channels is sent as uncompressed raw data; in the other, feature vectors extracted from the detected neural spikes are transmitted. Data streams coming from the channels are serialized by an embedded digital processor and transferred to the outside by means of the same inductive link used for powering the system. Simulation results show that the power consumption of the complete system is 377μW.Ministerio de Ciencia e Innovación TEC2009-0844

Анализ современных технологий водогазового воздействия на продуктивный пласт

Объектом исследования является оборудование для обратной закачки газа в пласт с целью увеличения нефтеотдачи а также утилизации попутного нефтяного газа. Цель работы – анализ эффективности внедрения новой технологической схемы по подготовке водогазовой смеси для закачки в пласт. В выпускной квалификационной работе приведены сведения о современном состоянии технологии обратной закачки газа в пласт. На основе промышленных испытаний на месторождениях и лабораторных исследований были проанализированы технологические схемы закачки водогазовой смеси в пласт с целью увеличения нефтеотдачи. Рассчитано устьевое давление необходимое для закачки раннее подготовленной смеси воды, газа. Приведены экономические расчеты, подтверждающие положительный эффект предлагаемой технологической схемы.Object of a research is the equipment for the return pumping gas in layer for the purpose of increase in oil recovery and also utilization of associated petroleum gas. The work purpose – the analysis of efficiency of introduction of the new technological scheme on preparation of water gas mix for downloading in layer. In final qualification work data on the current state of technology of the return pumping gas are provided to layer. On the basis of industrial tests on fields and laboratory researches technological schemes of pumping water gas mix in layer for the purpose of increase in oil recovery have been analysed

Low power 2.4 GHz quadrature generation for body area network applications

Trabajo presentado al ISCAS celebrado en Paris del 30 de mayo al 2 de junio de 2010.This paper presents two implementations of low-power quadrature generation for the new Bluetooth low energy standard in the 2.4 GHz ISM band. Both implementation have been designed in a 90 nm CMOS technology for a 1 V supply voltage and post-layout simulation results are presented. The first implementation is a quadrature voltage controlled oscillator (QVCO) with 180 μW power consumption and a phase noise of -112.7 dBc/Hz @1MHz. It employs a new technique to reduce the influence of magnetic coupling between the two spiral inductors. The second implementation employs a VCO running at twice the frequency with a subsequent divide-by-2 stage. Its total power consumption is 320 μW and the phase noise at the quadrature outputs is -115.7 dBc/Hz @1MHz.This work was supported by the Spanish Ministry of Education & Science under grants TEC2006-03022 and TEC2009-08447, and the Junta de Andalucía under grant TIC-02818.Peer Reviewe

A 350 µW 2.3 GHz integer-N frequency synthesizer for body area network applications

Conferencia celebrada en Phoenix (EE.UU) del 17 al 19 de Enero del 2011.This paper presents a low power integer-N synthesizer with an output frequency of 2.3 GHz. The complete PLL has been integrated in a 90 nm CMOS technology and operates from a 1 V supply voltage. The synthesizer has been optimized for power consumption by employing an efficient quadrature VCO and a phase-switching prescaler. It achieves a phase noise of -121 dBc/Hz @3MHz while consuming only 350 μW in the PLL core. The typical reference spur level is about -40 dBc.This work has been supported by the Spanish Ministry of Science and Innovation under grant TEC2009-08447, the Junta de Andalucía under grant TIC-02818 and the 2007- 2013 FEDER Program.Peer Reviewe

A 55 µW programmable gain amplifier with constant bandwidth for a direct conversion receiver

Comunicación presentada al "V VLSI Circuits and Systems" celebrado en Praga (República Checa) el 18 de Abril del 2011.A fully differential programmable gain amplifier (PGA) with constant transfer characteristic and very low power consumption is proposed and implemented in a 130 nm CMOS technology. The PGA features a gain range of 4 dB to 55 dB with a step size of 6 dB and a constant bandwidth of 10-550 kHz. It employs two stages of variable amplification with an intermediate 2nd order low-pass channel filter. The first stage is a capacitive feedback OTA using current-reuse achieving a low input noise density of 16.7 nV/√Hz. This stage sets the overall high-pass cutoff frequency to approximately 10 kHz. For all gain settings the high-pass cutoff frequency variation is within ±5%. The low-pass channel filter is merged with a second amplifying stage forming a Sallen-Key structure. In order to maintain a constant transfer characteristic versus gain, the Sallen-Key feedback is taken from different taps of the load resistance. Using this new approach, the low-pass cutoff frequency stays between 440 kHz and 590 kHz for all gain settings (±14%). Finally, an offset cancelation loop reduces the output offset of the PGA to less than 5 mV (3σ). The PGA occupies an area of approximately 0.06 mm2 and achieves a post-layout power consumption of 55 μW from a 1V-supply. For the maximum gain setting the integrated input referred noise is 14.4 μVRMS while the total harmonic distortion is 0.7 % for a differential output amplitude of 0.5 V.This work has been supported by the Spanish Ministry of Science and Innovation under grant TEC2009-08447, the Junta de Andalucía under grant TIC-02818 and the 2007-2013 FEDER Program.Peer reviewe

A 1.1mW-Rx, 5.9mW-Tx bluettoth low energy transceiver with -81.4 dBm sensitivity

Trabajo presentado al "International Solid-State Circuits Conference" celebrado en San Francisco (USA) del 19 al 23 de Febrero del 2012.This work has been supported by the Spanish Ministry of Science and Innovation under grant TEC2009-08447 and the 2007-2013 FEDER Program.Peer Reviewe

An RF-to-DC energy harvester for co-integration in a low-power 2.4 GHz transceiver frontend

Comunicación presentada al "ISCAS 2012" celebrado en Seúl (Corea del Sur) del 20 al 23 de Mayo del 2012.A 2.4 GHz energy harvester for co-integration into a low-power transceiver (TRx) operating at the same frequency is presented. An RF switch decouples the harvester from the TRx and keeps the performance degradation of the TRx low, i.e. 0.2 dB reduced output power in Tx-mode and 0.4 dB reduced sensitivity in Rx-mode. In order to enable the harvester to operate without a DC power supply, an RF switch is used that is passively turned on. The circuit is implemented in a 130 nm CMOS process, and requires a minimum input RF power of -10 dBm. Based on post-layout simulation results the proposed energy harvester achieves a peak efficiency of 22.7% at an input power level of -3 dBm.This work has been supported by the Spanish Ministry of Science and Innovation under grant TEC2009-08447, the Junta de Andalucía under grant TIC-02818 and the 2007-2013 FEDER Program.Peer Reviewe

imse pll jm2

A 2.4GHz low power integer-N PLL with quadrature outputs using two coupled VCO cores (Q-VCO)Transceptores CMOS a radiofrecuencia para redes de sensores inalámbricosProyecto X-WISE, Ref. TEC2006-03022/TCM (2006-2009), Ministerio de Educación y CienciaN

ble_trx-hrv

Bluetooth low energy transceiver working at 2.4GHz for biomedical applications with RF energy harvesting capabilityEste es un proyecto enmarcado en el programa europeo CHIST-ERA en el que cada grupo participante recibe la financiación directamente de su país mediante una segunda convocatoria nacional. En el proyecto PNEUMA se pretende desarrollar un sistema neuronal CMOS de tal manera que sobre el chip se ensamble un array de memristores para hacer las funciones de sinapsis adaptativas. Las neuronas son del tipo pulsantes (spking, en inglés), emulando así a las biológicas. De esta manera, el sistema híbrido CMOS + memristores sería capaz de aprender mediante reglas de aprendizaje del tipo STDP (Spike Timing Dependent Plasticity), al igual que ocurre en las neuronas biológicasProyecto POWDERS, Ministerio de Ciencia e Innovación (2011-2015)N