Calculation of the capacitance-voltage characteristic of GaAs, In0.53Ga0.47As, and InAs metal-oxide-semiconductor structures

The capacitance-voltage characteristic of GaAs, In0.53Ga0.47As, and InAs metal-oxide-semiconductor capacitors (MOSCAPs) is calculated in three cases. First, quantization is not considered, then quantization of the C-valley is included, and finally quantization of the Gamma-, X-, and L-valleys is included. The choice of valley energy-minima is shown to determine the onset of occupation of the satellite valleys and corresponding increase in total capacitance. An equivalent-oxide-thickness correction is defined and used as a figure-of-merit to compare III-V to Si MOSCAPs and as a metric for the density-of-states bottleneck. (C) 2011 American Institute of Physics. (doi:10.1063/1.3652699

Multi-frequency inversion-charge pumping for charge separation and mobility analysis in high-k/InGaAs metal-oxide-semiconductor field-effect transistors

An alternative multi-frequency inversion-charge pumping (MFICP) technique was developed to directly separate the inversion charge density (N-inv) from the trapped charge density in high-k/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). This approach relies on the fitting of the frequency response of border traps, obtained from inversion-charge pumping measurements performed over a wide range of frequencies at room temperature on a single MOSFET, using a modified charge trapping model. The obtained model yielded the capture time constant and density of border traps located at energy levels aligned with the InGaAs conduction band. Moreover, the combination of MFICP and pulsed I-d-V-g measurements enabled an accurate effective mobility vs N-inv extraction and analysis. The data obtained using the MFICP approach are consistent with the most recent reports on high-k/InGaAs. (C) 2015 AIP Publishing LLC

Electron energy band alignment at the (100)Si/MgO interface

The electron energy band diagram at the (100)Si/MgO interface is characterized using internal photoemission of electrons and holes from Si into the oxide. For the as-deposited amorphous MgO the interface barriers correspond to a band gap width of 6.1 eV, i.e., much lower than the conventionally assumed bulk crystal value (7.83 eV). The annealing-induced crystallization of MgO mostly affects the energy of the valence band while the conduction band bottom retains its energy position at 3.37 +/- 0.05 eV above the top of the silicon valence band.(C) 2010 American Institute of Physics. (doi:10.1063/1.3294328

Low-angle misorientation dependence of the optical properties of InGaAs/InAlAs quantum wells

We investigate the dependence of the low-temperature photoluminescence linewidths from InP-lattice-matched InGaAs/InAlAs quantum wells on the low-angle misorientation from the (100) surface of the host InP substrate. Quantum wells were grown on InP substrates misorientated by 0, 0.2, 0.4 and 0.6 degrees; 0.4 degrees was found to consistently result in the narrowest peaks, with the optimal spectral purity of ~4.25 meV found from a 15nm quantum well. The width of the emission from the 15nm quantum well was used to optimize the growth parameters. Thick layers of Si-doped InGaAs were then grown and found to have bulk, low temperature (77 K), electron mobilities up to \mu ~ 3.5 x 10^4 cm2/Vs with an electron concentration of ~1 x 10^16

Electrical and physical characterization of the Al₂O₃/ <i>p</i>-GaSb interface for 1%, 5%, 10%, and 22% (NH₄)₂S surface treatments

In this work, the impact of ammonium sulfide ((NH&lt;sub&gt;4&lt;/sub&gt;)&lt;sub&gt;2&lt;/sub&gt;S) surface treatment on the electrical passivation of the Al&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt;/ &lt;i&gt;p&lt;/i&gt;-GaSb interface is studied for varying sulfide concentrations. Prior to atomic layer deposition of Al&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt;, GaSb surfaces were treated in 1%, 5%, 10%, and 22% (NH&lt;sub&gt;4&lt;/sub&gt;)&lt;sub&gt;2&lt;/sub&gt;S solutions for 10 min at 295 K. The smallest stretch-out and flatband voltage shifts coupled with the largest capacitance swing, as indicated by capacitance-voltage (&lt;i&gt;CV&lt;/i&gt;) measurements, were obtained for the 1% treatment. The resulting interface defect trap density (&lt;i&gt;D&lt;/i&gt;&lt;sub&gt;it&lt;/sub&gt;) distribution showed a minimum value of 4 x 10&lt;sup&gt;12&lt;/sup&gt; cm&lt;sup&gt;-2&lt;/sup&gt;eV&lt;sup&gt;-1&lt;/sup&gt; at &lt;i&gt;E&lt;/i&gt;&lt;sub&gt;v&lt;/sub&gt; + 0.27 eV. Transmission electron microscopy and atomic force microscopy examination revealed the formation of interfacial layers and increased roughness at the Al&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt;/ &lt;i&gt;p&lt;/i&gt;-GaSb interface of samples treated with 10% and 22% (NH&lt;sub&gt;4&lt;/sub&gt;)&lt;sub&gt;2&lt;/sub&gt;S. In combination, these effects degrade the interface quality as reflected in the &lt;i&gt;CV&lt;/i&gt; characteristics

Si(100)-SiO2 interface properties following rapid thermal processing

An experimental examination of the properties of the Si(100)-SiO2 interface measured following rapid thermal processing (RTP) is presented. The interface properties have been examined using high frequency and quasi-static capacitance-voltage (CV) analysis of metal-oxide-silicon (MOS) capacitor structures immediately following either rapid thermal oxidation (RTO) or rapid thermal annealing (RTA). The experimental results reveal a characteristic peak in the CV response measured following dry RTO and RTA (T > 800 degreesC), as the Fermi level at the Si(100)-SiO2 interface approaches the conduction band edge. Analysis of the QSCV responses reveals a high interface state density across the energy gap following dry RTO and RTA processing, with a characteristic peak density in the range 5.5x10(12) to 1.7x10(13) cm(-2) eV(-1) located at approximately 0.85-0.88 eV above the valence band edge. When the background density of states for a hydrogen-passivated interface is subtracted, another peak of lower density (3x10(12) to 7x10(12) cm(-2) eV(-1)) is observed at approximately 0.25-0.33 eV above the valence band edge. The experimental results point to a common interface state defect present after processes involving rapid cooling (10(1)-10(2) degreesC/s) from a temperature of 800 degreesC or above, in a hydrogen free ambient. This work demonstrates that the interface states measured following RTP (T > 800 degreesC) are the net contribution of the P-b0/P-b1 silicon dangling bond defects for the oxidized Si(100) orientation. An important conclusion arising from this work is that the primary effect of an RTA in nitrogen (600-1050 degreesC) is to cause hydrogen desorption from pre-existing P-b0/P-b1 silicon dangling bond defects. The implications of this work to the study of the Si-SiO2 interface, and the technological implications for silicon based MOS processes, are briefly discussed. The significance of these new results to thin oxide growth and optimization by RTO are also considered

Analysis of the breakdown spot spatial distribution in Pt/HfO2/Pt capacitors using nearest neighbor statistics

The breakdown spot spatial distribution in Pt/HfO2/Pt capacitors is investigated using nearest neighbor statistics in combination with more conventional estimation methods such as the point-event and event-event distance distributions. The spots appear as a random point pattern over the top metal electrode and arise as a consequence of significant localized thermal effects caused by the application of high-voltage ramped stress to the devices. The reported study mainly involves the statistical characterization of the distances between each failure site and the nearest, second nearest,... kth nearest event and the comparison with the corresponding theoretical distributions for a complete spatial randomness (CSR) process. A method for detecting and correcting deviations from CSR based on a precise estimation of the average point intensity and the effective damaged device area is proposed. (C) 2013 AIP Publishing LLC

Comparing leakage currents and dark count rates in Geiger-mode avalanche photodiodes

This letter presents an experimental study of dark count rates and leakage current in Geiger-mode avalanche photodiodes (GM APD). Experimental results from circular diodes over a range of areas (20-500 mum diam), exhibit leakage current levels orders of magnitude higher than anticipated from dark count rates. Measurements of the area and peripheral components of the leakage current indicate that the majority of the current in reverse bias does not enter the high-field region of the diode, and therefore, does not contribute to the dark count rate. Extraction of the area leakage current term from large-area devices (500 mum) corresponds well with the measured dark count rates on smaller devices (20 mum). Finally, the work indicates how dark count measurements represent 10(-18) A levels of leakage current detection in GM APDs. (C) 2002 American Institute of Physics. (DOI: 10.1063/1.1483119

Analysis of P-b centers at the Si(111)/SiO2 interface following rapid thermal annealing

In this work, an experimental study of defects at the Si(111)/SiO2 interface following rapid thermal annealing (RTA) in a nitrogen ambient at 1040 degreesC is presented. From a combined analysis using electron spin resonance and quasistatic capacitance-voltage characterization, the dominant defects observed at the Si(111)/SiO2 interface following an inert ambient RTA process are identified unequivocally as the P-b signal (interfacial Si-3=Si-.) for the oxidized Si(111) orientation. Furthermore, the P-b density inferred from electron spin resonance (7.8+/-1)x10(12) cm(-2), is in good agreement with the electrically active interface state density (6.7+/-1.7)x10(12) cm(-2) determined from analysis of the quasistatic capacitance-voltage response

A combined hard x-ray photoelectron spectroscopy and electrical characterisation study of metal/SiO2/Si(100) metal-oxide-semiconductor structures

Combined hard x-ray photoelectron spectroscopy (HAXPES) and electrical characterisation measurements on identical Si based metal-oxide-semiconductor structures have been performed. The results obtained indicate that surface potential changes at the Si/SiO2 interface due to the presence of a thin Al or Ni gate layer can be detected with HAXPES. Changes in the Si/SiO2 band bending at zero gate voltage and the flat band voltage for the case of Al and Ni gate layers derived from the silicon core levels shifts observed in the HAXPES spectra are in agreement with values derived from capacitance-voltage measurements. (C) 2012 American Institute of Physics. (http://dx.doi.org/10.1063/1.4770380