Via Coupling Within Power-Return Plane Structures Considering the Radiation Loss

An accurate analytical model to predict via coupling within rectangular power-return plane structures is developed. Loss mechanisms, including radiation loss, dielectric loss, and conductor loss, are considered. The radiation loss is incorporated into a complex propagating wavenumber as an artificial loss mechanism. The quality factors associated with the three loss mechanisms are calculated and compared. The effects of radiation loss on input impedances and reflection coefficients are investigated for both high-dielectric-loss and low-dielectric-loss PCBs. Measurements are performed to validate the effectiveness of the model

Analytical Model for the Rectangular Power-ground Structure Including Radiation Loss

An accurate analytical model to predict via coupling within rectangular power-return plane structures is developed. Loss mechanisms, including radiation loss, dielectric loss, and conductor loss, are considered in this model. The radiation loss is incorporated into a complex propagating wavenumber as an artificial loss mechanism. The quality factors associated with three loss mechanisms are calculated and compared. The effects of radiation loss on input impedances and reflection coefficients are investigated for both high-dielectric-loss and low-dielectric-loss printed circuit boards. Measurements are performed to validate the effectiveness of this model

Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique

A circuit extraction tool (CEMPIE) has been developed based on the mixed-potential integral equation (MPIE) using a quasi-static approximation. A power-bus in a multi-layered PCB consisting of a pair of dedicated ground and power planes is studied using this tool. The distributed behavior of a power-bus is represented by a collection of passive circuit elements, which is valid up to several gigahertz. The decoupling performance of a power-bus due to its layer spacing and the dielectric constant is evaluated for simple test geometries. The impact of the relative distance between the noise source and the potential receiver is also studied. Novel structures such as a power island were studied in both thin and thick boards, and the decoupling performance due to the locations and values of the decoupling capacitors were also investigated

An Experimental Procedure for Characterizing Interconnects to the DC Power Bus on a Multilayer Printed Circuit Board

The effectiveness of dc power-bus decoupling is impacted by the inductance associated with interconnect vias in printed circuit boards (PCB\u27s). Adequate characterization of these interconnects is necessary to facilitate modeling and simulation, and to assess the effectiveness of added decoupling. In this study, a measurement procedure is presented for determining the series inductance and resistance of an interconnect with a network analyzer. The validity and limitations of the procedure are discussed. Experimental results of interconnect parameters on an 8 × 10 in ten-layer test-board corroborate those measured with a precision impedance analyzer. The measured interconnect values are used to simulate several cases of power-bus decoupling which show good agreement with two-port swept frequency measurements

Simulation and Measurement for Decoupling on Multilayer PCB DC Power Buses

DC power bus decoupling of a multi-layer PCB is modeled by a combination of a lumped circuit model at low frequencies ( \u3c 200 MHz), and a mixed-potential integral equation approach at high frequencies. In order to determine the lumped parameters of via interconnects, an effective procedure using a network analyzer has been developed to characterize the trace/via inductances/resistances. For an 8 inch × 10 inch ten-layer test board used in this study, the simulations show good agreement with the measurement. This method can lead to new design strategies of decoupling for multilayer PCB power buses

Incorporating Vertical Discontinuities in Power-Bus Modeling using a Mixed-Potential Integral Equation and Circuit Extraction Formulation

Noise on the DC power-bus attributed to device switching is among the primary sources of EMI and signal integrity problems. A mixed-potential integral equation formulation with circuit extraction approach is used to model the planar multi-layer power-bus geometry, which can also include arbitrary shaped power regions on multiple layers. Incorporating vertical discontinuities, e.g., decoupling capacitor interconnects, is a critical aspect of the modeling, and must be done properly since they are included as a lumped element model and not a part of the MPIE formulation. Agreement with experimental results demonstrate the present approach

JUN dependency in distinct early and late BRAF inhibition adaptation states of melanoma.

A prominent mechanism of acquired resistance to BRAF inhibitors in BRAF (V600) -mutant melanoma is associated with the upregulation of receptor tyrosine kinases. Evidences suggested that this resistance mechanism is part of a more complex cellular adaptation process. Using an integrative strategy, we found this mechanism to invoke extensive transcriptomic, (phospho-) proteomic and phenotypic alterations that accompany a cellular transition to a de-differentiated, mesenchymal and invasive state. Even short-term BRAF-inhibitor exposure leads to an early adaptive, differentiation state change-characterized by a slow-cycling, persistent state. The early persistent state is distinct from the late proliferative, resistant state. However, both differentiation states share common signaling alterations including JUN upregulation. Motivated by the similarities, we found that co-targeting of BRAF and JUN is synergistic in killing fully resistant cells; and when used up-front, co-targeting substantially impairs the formation of the persistent subpopulation. We confirmed that JUN upregulation is a common response to BRAF inhibitor treatment in clinically treated patient tumors. Our findings demonstrate that events shared between early- and late-adaptation states provide candidate up-front co-treatment targets

RF Isolation using Power Islands in DC Power Bus Design

Power island structures are often employed for minimizing the propagation of high-frequency noise on DC power buses. The rationale is based on introducing a series impedance in the power plane to provide isolation of a noise source from the rest of the PCB design. The power island concept is investigated herein experimentally, to determine its noise mitigation attributes and limitations. A modeling approach that is suitable for arbitrary PCB island geometries including lumped SMT decoupling capacitors is also presented. The modeling and measurements indicate that island structures can achieve some degree of isolation under certain conditions