31 research outputs found

    Investigation of the Slow- and Fast-Light Effect on the Basis of Stimulated Brillouin Scattering for Application in Optical Communication and Information Systems.

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    In today\u27s information age demand for ultra-fast information transfer with ultra-high bandwidths has reached extraordinary levels. Hence, the transmission in the future internet-backbone will be increasingly constrained in the network nodes. At the same time, the power consumption of the network systems will increase to unsustainable levels. Nowadays, optical signal processing and switching can be implemented relatively easily. However, the realization of optical bu ers and short-term memories is still an unsolved challenge. The slow- and fast-light e ect has been investigated as one solution for the optical bu ering over the last few years. It means the slowing down and acceleration of the group velocity of light pulses in a medium. To realize this, many di erent methods and material systems have been developed but due to its signi cant advantages the nonlinear e ect of stimulated Brillouin scattering (SBS) is particularly promising. However, it also su ers from disadvantages which limit the slow- and fast-light performance

    A 30 Gb/s High-Swing, Open-Collector Modulator Driver in 250 nm SiGe BiCMOS

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    This paper presents a modulator driver realized as a breakdown voltage doubler which can provide a high output swing of 7.6 Vpp,diff for load impedances as low as 30 Ω, thus overcoming the limitation imposed by the collector-emitter breakdown voltage. The open-collector design gives an important degree of freedom regarding the modulator load to be driven, while significantly reducing the circuit's power consumption. The driver is capable of running at 30 Gb/s while dissipating 1 W of DC power. Thanks to the inductorless design, the active area occupied by the circuit is only 0.28 mm × 0.23 mm. The driver was realized in a 250 nm SiGe BiCMOS technology

    Zero-Broadening Measurement in Brillouin Based Slow-Light Delays

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    A novel method for the achievement of zero-broadening in a SBS based slow-light system is discussed in theory and demonstrated experimentally. The system is realized just with a single broadened Brillouin gain. It is shown, that if the gain bandwidth is much broader than the initial pulse width, the output pulse width decreases with increasing pump power. A compression of approximately 90 % of the initial pulse width was achieved in simulation and experiment

    Survey of Photonic and Plasmonic Interconnect Technologies for Intra-Datacenter and High-Performance Computing Communications

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    Large scale data centers (DC) and high performance computing (HPC) systems require more and more computing power at higher energy efficiency. They are already consuming megawatts of power, and a linear extrapolation of trends reveals that they may eventually lead to unrealistic power consumption scenarios in order to satisfy future requirements (e.g., Exascale computing). Conventional complementary metal oxide semiconductor (CMOS)-based electronic interconnects are not expected to keep up with the envisioned future board-to-board and chip-to-chip (within multi-chip-modules) interconnect requirements because of bandwidth-density and power-consumption limitations. However, low-power and high-speed optics-based interconnects are emerging as alternatives for DC and HPC communications; they offer unique opportunities for continued energy-efficiency and bandwidth-density improvements, although cost is a challenge at the shortest length scales. Plasmonics-based interconnects on the other hand, due to their extremely small size, offer another interesting solution for further scaling operational speed and energy efficiency. At the device-level, CMOS compatibility is also an important issue, since ultimately photonics or plasmonics will have to be co-integrated with electronics. In this paper, we survey the available literature and compare the aforementioned interconnect technologies, with respect to their suitability for high-speed and energy-efficient on-chip and offchip communications. This paper refers to relatively short links with potential applications in the following interconnect distance hierarchy: local group of racks, board to board, module to module, chip to chip, and on chip connections. We compare different interconnect device modules, including low-energy output devices (such as lasers, modulators, and LEDs), photodetectors, passive devices (i.e., waveguides and couplers) and electrical circuitry (such as laserdiode drivers, modulator drivers, transimpedance, and limiting amplifiers). We show that photonic technologies have the potential to meet the requirements for selected HPC and DC applications in a shorter term. We also present that plasmonic interconnect modules could offer ultra-compact active areas, leading to high integration bandwidth densities, and low device capacitances allowing for ultra-high bandwidth operation that would satisfy the application requirements further into the future

    Adaptive optical interconnects: The ADDAPT project

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    Existing optical networks are driven by dynamic user and application demands but operate statically at their maximum performance. Thus, optical links do not offer much adaptability and are not very energy-effcient. In this paper a novel approach of implementing performance and power adaptivity from system down to optical device, electrical circuit and transistor level is proposed. Depending on the actual data load, the number of activated link paths and individual device parameters like bandwidth, clock rate, modulation format and gain are adapted to enable lowering the components supply power. This enables exible energy-efficient optical transmission links which pave the way for massive reductions of CO2 emission and operating costs in data center and high performance computing applications. Within the FP7 research project Adaptive Data and Power Aware Transceivers for Optical Communications (ADDAPT) dynamic high-speed energy-efficent transceiver subsystems are developed for short-range optical interconnects taking up new adaptive technologies and methods. The research of eight partners from industry, research and education spanning seven European countries includes the investigation of several adaptive control types and algorithms, the development of a full transceiver system, the design and fabrication of optical components and integrated circuits as well as the development of high-speed, low-loss packaging solutions. This paper describes and discusses the idea of ADDAPT and provides an overview about the latest research results in this field

    Effective 100 Gb/s IM/DD 850-nm Multi- and Single-Mode VCSEL Transmission Through OM4 MMF

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    To cope with the ever increasing data traffic demands in modern data centers, new approaches and technologies must be explored. Short range optical data links play a key role in this scenario, enabling very high speed data rate links. Recently, great research efforts are being made to improve the performance of vertical-cavity surface-emitting lasers (VCSELs) based transmission links, which constitute a cost-effective solution desirable for massive deployments. In this paper, we experimentally demonstrate intensity-modulation direct-detection transmissions with a data rate of 107.5 Gb/s over 10 m of OM4 multimode fiber (MMF) using a multimode VCSEL at 850 nm, and up to 100 m of OM4 MMF using a single-mode VCSEL at 850 nm. Measured bit error rates were below 7% overhead forward error correction limit of 3.8e−03, thus, achieving an effective bit rate of 100.5 Gb/s. These successful transmissions were achieved by means of the multiband approach of carrierless amplitude phase modulation. To cope with the ever increasing data traffic demands in modern data centers, new approaches and technologies must be explored. Short range optical data links play a key role in this scenario, enabling very high speed data rate links. Recently, great research efforts are being made to improve the performance of vertical-cavity surface-emitting lasers (VCSELs) based transmission links, which constitute a cost-effective solution desirable for massive deployments. In this paper, we experimentally demonstrate intensity-modulation direct-detection transmissions with a data rate of 107.5 Gb/s over 10 m of OM4 multimode fiber (MMF) using a multimode VCSEL at 850 nm, and up to 100 m of OM4 MMF using a single-mode VCSEL at 850 nm. Measured bit error rates were below 7% overhead forward error correction limit of 3.8e-03, thus, achieving an effective bit rate of 100.5 Gb/s. These successful transmissions were achieved by means of the multiband approach of carrierless amplitude phase modulation

    Low power laser driver design in 28nm CMOS for on-chip and chip-to-chip optical interconnect

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    This paper discusses the challenges and the trade-offs in the design of laser drivers for very-short distance optical communications. A prototype integrated circuit is designed and fabricated in 28 nm super-low-power CMOS technology. The power consumption of the transmitter is 17.2 mW excluding the VCSEL that in our test has a DC power consumption of 10 mW. The active area of the driver is only 0.0045 mm². The driver can achieve an error-free (<BER < 10^12) electrical data-rate of 25 Gbit/s using a pseudo random bit sequence of 2^7-1. When the driver is connected to the VCSEL module an open optical eye is reported at 15 Gbit/s. In the tested bias point the VCSEL module has a measured bandwidth of 10.7 GHz

    20–25 Gbit/s low-power inductor-less single-chip optical receiver and transmitter frontend in 28 nm digital CMOS

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    The design of an analog frontend including a receiver amplifier (RX) and laser diode driver (LDD) for optical communication system is described. The RX consists of a transimpedance amplifier, a limiting amplifier, and an output buffer (BUF). An offset compensation and common-mode control circuit is designed using switched-capacitor technique to save chip area, provides continuous reduction of the offset in the RX. Active-peaking methods are used to enhance the bandwidth and gain. The very low gate-oxide breakdown voltage of transistors in deep sub-micron technologies is overcome in the LDD by implementing a topology which has the amplifier placed in a floating well. It comprises a level shifter, a pre-amplifier, and the driver stage. The single-chip frontend, fabricated in a 28 nm bulk-digital complementary metal–oxide–semiconductor (CMOS) process has a total active area of 0.003 mm² , is among the smallest optical frontends. Without the BUF, which consumes 8 mW from a separate supply, the RX power consumption is 21 mW, while the LDD consumes 32 mW. Small-signal gain and bandwidth are measured. A photo diode and laser diode are bonded to the chip on a test-printed circuit board. Electro-optical measurements show an error-free detection with a bit error rate of 10⁻¹² at 20 Gbit/s of the RX at and a 25 Gbit/s transmission of the LDD
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