183 research outputs found
Reusing Logic Masking to Facilitate Hardware Trojan Detection
Hardware Trojan (HT) and Integrated Circuit
(IC)/ Intellectual Property (IP) piracy are important threats
which may happen in untrusted fabrication foundries. Modifying
structurally the ICs/IPs design to counter the HT threats has
been proposed, and it is known as Design-For-Hardware-Trust
(DFHT). DFHT methods are used in order to facilitate HT
detection methods. In addition, logic masking methods modify
the IPs/ICs design to harden them against the IP/IC piracy.
These methods modify a circuit such that it does not work
correctly without applying the correct key. In this paper, we
propose DFHT methods leveraging logic masking approach
SALWARE: Salutary Hardware to design Trusted IC.
Fabless semiconductor industries are facing the rise of design costs of integrated circuits. This rise is link to the technology change and the complexity increasing. It follows that integrated circuits have become targets of counterfeiting and theft. The SALWARE project aims to study (theoretically and experimentally) salutary hardware design in order to fight against theft, illegal cloning and counterfeiting of integrated circuits. Salutary hardware means an embedded hardware system, hardly detectable / circumvented, inserted in an integrated circuit or a virtual component (Intellectual Property), used to provide intellectual property information (eg watermarking or hardware license) and / or to remotely activate the circuit or IP after manufacture and during use
Authentication of IC based on Electromagnetic Signature
IC Counterfeiting is becoming serious issue. The
approach discussed here is to use Electromagnetic (EM) input
to an IC and measure its EM input output response. The idea
is to extract a signature from EM response which should be
unique to one IC. The main purpose of this work is to show
that it is possible to authenticate electronic chips from a nonintrusive
method, based on the use of RF waves. IC authentication
can be performed using Physical Unclonable Function (PUF).
PUF are based on process variation inherent to semiconductor
fabrication process. EM based authentication is also based on
the same principle. Nevertheless, unlike PUF such a method does
not need dedicated circuitry and thus may have lower cost of
implementation and may be easier to industrialize. This work first
focuses on FPGA which are a common target of counterfeiting.
We first prove that FPGAs are sensitive to EM excitations and
find the optimum configuration using a lightweight marker not
as complex as PUF to optimize the sensitivity to EM excitation.
Finally, a post processing is performed on the EM measurement
to get the FPGA signature which is later used for authentication.
The post-processing operations are being developed in order to
deal with aging effects and other measurements issues commonly
seen with RF measurement
Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection
International audienceNowadays, electronics systems design is a complex process. A design-and-reuse model has been adopted, and the vast majority of designers integrates third party intellectual property (IP) cores in their design in order to reduce time to market. Due to their immaterial form and high market value, IP cores are exposed to threats such as cloning and illegal copying. In order to fight these threats, we propose to achieve functional locking, equivalent to a triggerable and reversible denial-of-service. This is done by inserting locking gates at specific locations in the netlist, allowing to force outputs at a fixed value. We developed a new method based on graph exploration techniques for locking gates insertion. It selects candidate nodes ten thousand times faster than state-of-the-art fault analysis-based logic masking techniques. Methods are then compared on ISCAS'85 combinational benchmarks
It’s About Time: The Long Overdue Demise of Statutes of Repose in Latent Toxic Tort Litigation
International audienceToubkal is a new hardware architecture which provides secure, efficient and flexible hardware isolation. It is a modular system that offers strong separation of different hardware modules within a system. Lightweight devices use mainly a Memory Protection Unit (MPU) to protect the memory and create an isolation architecture. However, the MPU offers only a memory control access for the software running on the system. This scheme does not prevent other hardware components from accessing system memories. Toubkal aims to enhance these MPU architectures by adding a new hardware layer to create different access environments for different hardware components. Toubkal has been designed in such a way that it can easily be adapted to the system needs in terms of security, safety and performances. It does not require any change in the existing hardware modules. We present a detailed description of the architecture, then we compare and discuss run-time, area overhead as well as security limitations using different policies and options. The first experimental hardware module increases between 0.08% and 8.5% a single core Rocket Chip cells area
On a Side Channel and Fault Attack Concurrent Countermeasure Methodology for MCU-based Byte-sliced Cipher Implementations
As IoT applications are increasingly being deployed, there comes along an ever increasing need for the security and privacy of the involved data. Since cryptographic implementations are used to achieve these goals, it is important for embedded software developers to take into consideration hardware attacks. Side Channel Analysis (SCA) and Fault Attacks (FA) are the main classes of such attacks, which can either reduce or even eliminate the security levels of an em-bedded design. Therefore, cryptographic implementations must address both of them at the same time. To this end, multiple solutions have been proposed to address both attacks in one solution, such as Dual Pre-charge Logic (DPL) and Encoding countermeasures. In this work, we discuss the advantages and disadvantages of the state of the art, concurrent SCA and FA countermeasures. Additionally, we propose a software countermeasure in order to provide protection against both types of attacks. The proposed countermeasure is a general approach, applicable to any byte-sliced cipher and any modern MCUs (32- and 64-bit). The proposed countermeasure is ap-plied to an AES S-BOX implementation, for a 32-bit MCU (ARM Cortex-M3). The countermeasure has been experimen-tally evaluated against Correlation Power Analysis (CPA) attacks for both platforms while its fault detection capabilities are theoretically described
Slot Machine Near Wins: Effects on Pause and Sensitivity to Win Ratios
When a near-win outcome occurs on a slot machine, stimuli presented resemble those presented when money is won, but no money is won. Research has shown that gamblers prefer and play for longer on slot machines that present near wins. One explanation for this is that near wins are conditioned reinforcers. If so, near wins would produce longer latencies to the next response than clear losses. Another explanation is that near wins produce frustration; if so, then near wins would produce shorter response latencies. The two current experiments manipulated win ratio across two concurrently available slot machines and also manipulated near win frequency. Latencies were longer following near wins, consistent with near wins functioning as conditioned reinforcers. We also explored the effects of near wins on sensitivity to relative win rate and found that higher rates of near wins were associated with greater sensitivity to relative win frequency, an effect also consistent with near wins as conditioned reinforcers
O CONTEXTO PÓS-DEMARCATÓRIO: QUANDO SE TRATA DE REDEFINIR O CONTROLE SOCIAL SOBRE OS RECURSOS NATURAIS E BENS CULTURAIS
O artigo apresenta formulações que se desdobram da sÃntese teórica para a reorganização social de grupos étnicos elaboradas pelo antropólogo João Pacheco de Oliveira, em especial quando atrelada à conquista de garantias fundiárias. A intenção, neste momento, foi avolumar a discussão desse lugar teórico estabelecido pelo supracitado autor para aprofundar a ideia da redefinição do controle social sobre os recursos ambientais. A expectativa é que, ao explorar tais concepções, seja possÃvel contribuir para os estudos voltados à compreensão de movimentos identitários socioespaciais reivindicatórios, gerando aportes para interpretações do momento pós-demarcatório, dialogando com o que é denominado atualmente de gestão ambiental e territorial em terras indÃgenas. Neste ensaio, formulou-se a ideia da redefinição do controle social sobre os recursos naturais e bens culturais como fenômeno relevante nas interpretações de processos de reorganização social de repercussão territorial de grupos sociais e étnicos
CALIDAD BACTERIOLÓGICA DEL AGUA UTILIZADA EN LAS JERINGAS TRIPLES DE LAS UNIDADES DENTALES DE LOS PUESTOS DE SALUD - MINSA DE LA PROVINCIA DE TACNA
INTRODUCCIÓN: Para el profesional en odontologÃa es importante conocer la calidad bacteriológica del agua utilizada en sus unidades dentales con el fin de poder garantizar calidad y seguridad en los procedimientos que se realicen en los ambientes de los consultorios odontológicos. MATERIALES Y MÉTODOS: Estudio de corte transversal, tipo descriptivo. Se analizaron 28 muestras de 14 jeringas triples de los consultorios dentales durante dos dÃas. RESULTADOS: El 71,43 % de las jeringas resultaron no aptas considerando los aspectos bacteriológicos descritos en la norma nacional. CONCLUSIÓN: La calidad bacteriológica del agua potable que se usa en las unidades dentales de los puestos de salud de la Provincia de Tacna es deficiente
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