A Note on Charge Quantization Through Anomaly Cancellation

In a minimal extension of the Standard Model, in which new neutral fermions have been introduced, we show that the requirement of vanishing anomalies fixes the hypercharges of all fermions uniquely. This naturally leads to electric charge quantization in this minimal scenario which has features similar to the Standard Model: invariance under the gauge group $SU(2)_L\otimes U(1)_Y$, conservation of the total lepton number and masslessness for the ordinary neutrinos. Such minimal models might arise as low-energy realizations of some heterotic superstring models or $SO(10)$ grand unified theories.Comment: 14p., TeX, (final version

Human evolution and culture in relationship to shame in the parenting role: Implications for psychology and psychotherapy

There is considerable evidence that early parenting has profound effects on a range of physiological and psychological maturation processes. Furthermore, psychotherapy often addresses some of the distortions and developmental difficulties that have arisen from early childhood. While research has focused on obvious candidates such as abuse and neglect, this paper reviews some of the core themes related to a less investigated area, specifically parental shame on child development. Role shame sensitive parenting styles will be explored against an evolutionary background that contrasts early human and modern human rearing contexts. We also outline a study examining the role of shame in psychological controlling and dysfunctional parenting styles, its relationship to different dimensions of shame and fears of compassion. An online survey was conducted containing self‐report measures of dysfunctional parenting styles, three dimensions of shame (external, internal, and reflected), fears of compassion, mental health indices, and a measure of psychological flexibility. An online survey was accessed by 333 parents (306 being female) with a child between the ages of 3–9 years. Two hierarchical multiple regressions indicated support for our two primary hypotheses, with shame explaining significant variance in both psychological controlling and dysfunctional parenting styles over and above that explained by psychological inflexibility, parental mental health, and fears of compassion. Additionally, results from standard multiple regressions indicated that fears of compassion account for significant variance in external shame, as well as internal and reflected shame. Recommendations for future research include focusing on parental motivation in order to help support parents and children are provided. Shame is a major factor for how parents engage in parenting practices and respond to their children. Practitioners need to be sensitive to the shame parents can experience and asses for it Assessing shame‐threat in parenting and shifting to compassionate motivation can lead to more responsive and positive parenting.N/

Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis

International audienceInternet of Things (IoT) applications deployment relies on low-power circuits. Nowadays, on top of power consumption, security concern has become a real issue. LightWeight Cryptography (LWC) has been developed to answer this challenge. In the lightweight cryptographic landscape, the PRESENT algorithm exhibits low power and small area features. At the same time, emergent resistive memory technologies such as Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) seem to be a strong candidate for Flash replacement with advanced design features such as hybridization with CMOS. In this context, we propose a hybrid CMOS/STT-MRAM technology for PRESENT cryptographic circuit for normally-off IoT applications. We demonstrate that the hybrid implementation is more power-efficient than the CMOS implementation when switched off for a period longer than 49.1 ms for a 180 nm CMOS core process with an area overhead of x7. Based on this result, trends down to 28 nm node are studied and lead to outstanding performances with a power-effeciency of the hybrid version reached after 185 µs in standby mode. In this scenario, an energy of 6,1 pJ is sufficient to store data in the Non-Volatile Flip-Flops (NVFFs) with a reduced area overhead of x0.23

Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM

International audienceIntegrated Circuits (ICs) have to be protected against threatening environmental radiations and malicious perturbations. A large panel of countermeasures has been developed to answer the needs of this challenging field. The Bulk Built-In Current Sensor (BBICS) is a highly reliable solution for the detection of these abnormal transient radiations that could induce a transient current in the Front-End of Line (FEoL). This paper proposes an innovative sensor based on the BBICS associated to the power-efficient emerging non-volatile memory Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM). The goal of this security solution is to detect both possible photoelectrical laser injections and thermal perturbations. Thus, the proposed architecture designated by Dual Detection of Heating and Photocurrent attacks (DDHP) highlights a dual detection efficiency, on the CMOS circuitry and on the Back-End of Line (BEoL) STT-MRAM technology

Impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues

International audienceThe Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) has been identified, by the International Technology Roadmap for Semiconductors (ITRS), as one of the most promising emerging technology. Different works handled the retention and reliability of STT-MRAM. However, to the best of our knowledge, the impact of a pulsed laser beam on STT-MRAM reliability and security has not been investigated so far as proposed in this paper. Since STT-MRAM are Back-end Of Line devices, we exposed the bit cells from the front-side to a 1064 nm wavelength laser pulse. The devices are electrically characterized (switching conditions between the two logical states) before and after the laser irradiation. The main result of this study is the demonstration of a resistance switching from Anti-Parallel (AP) to Parallel (P) state after the laser irradiation. That is how data integrity was altered by this irradiation, flipping the bit stored in this memory

MRAM: from STT to SOT, for security and memory

International audienc