17 research outputs found
Revisiting the bicriteria (length,reliability) multiprocessor static scheduling problem
Our starting point is a dependency task graph and an heterogeneous distributed memory target architecture. We revisit the well studied problem of bicriteria (length,reliability) multiprocessor static scheduling of this task graph onto this architecture. Our first criteria remains the static schedule's length: this is crucial to assess the system's real-time property. For our second criteria, we consider the global system failure rate, seen as if the whole system were a single task scheduled onto a single processor, instead of the usual reliability, because it does not depend on the schedule length like the reliability does (due to its computation in the classical reliability model of Shatz and Wang). Therefore, we control better the replication factor of each individual task of the dependency task graph given as a specification, with respect to the desired failure rate. To solve this bicriteria optimization problem, we take the failure rate as a constraint, and we minimize the schedule length. We are thus able to produce, for a given application task graph and multiprocessor architecture, a Pareto curve of non-dominated solutions, among which the user can choose the compromise that fits his requirements best
A novel bicriteria scheduling heuristics providing a guaranteed global system failure rate
International audienceWe propose a new framework for the (length,reliability) bicriteria static multiprocessor scheduling problem. Our first criterion remains the schedule's length, crucial to assess the system's real-time property. For our second criterion, we consider the global system failure rate, seen as if the whole system were a single task scheduled onto a single processor, instead of the usual reliability, because it does not depend on the schedule length like the reliability does (due to its computation in the classical exponential distribution model). Therefore, we control better the replication factor of each individual task of the dependency task graph given as a specification, with respect to the desired failure rate. To solve this bicriteria optimization problem, we take the failure rate as a constraint, and we minimize the schedule length. We are thus able to produce, for a given dependency task graph and multiprocessor architecture, a Pareto curve of non-dominated solutions, among which the user can choose the compromise that fits his requirements best. Compared to the other bicriteria (length,reliability) scheduling algorithms found in the literature, the algorithm we present here is the first able to improve significantly the reliability, by several orders of magnitude, making it suitable to safety critical systems
Tradeoff exploration between reliability, power consumption, and execution time for embedded systems
International audienceFor autonomous critical real-time embedded systems (e.g., satellite), guaranteeing a very high level of reliability is as important as keeping the power consumption as low as possible. We propose an off-line scheduling heuristic which, from a given software application graph and a given multiprocessor architecture (homogeneous and fully connected), produces a static multiprocessor schedule that optimizes three criteria: its length (crucial for real-time systems), its reliability (crucial for dependable systems), and its power consumption (crucial for autonomous systems). Our tricriteria scheduling heuristic, called TSH, uses the active replication of the operations and the data-dependencies to increase the reliability and uses dynamic voltage and frequency scaling to lower the power consumption. We demonstrate the soundness of TSH. We also provide extensive simulation results to show how TSH behaves in practice: first, we run TSH on a single instance to provide the whole Pareto front in 3D; second, we compare TSH versus the ECS heuristic (Energy-Conscious Scheduling) from the literature; and third, we compare TSH versus an optimal Mixed Linear Integer Program
Scheduling of Real-Time Embedded Systems under Reliability and Power Constraints
International audienceIn this paper, we present a new tri-criteria scheduling heuristic for scheduling data-flow graphs of operations onto parallel homogeneous architectures according to three criteria: first the minimization of the schedule length (crucial for real-time systems), second the maximization of the system reliability (crucial for dependable systems), and third minimizing energy consumption (crucial for autonomous systems). The proposed algorithm is a list scheduling heuristics, It uses the active replication of operations to improve the reliability and the dynamic voltage scaling to minimize the energy consumption.Nous présentons une nouvelle heuristique d'ordonnancement tri-critères pour l'ordonnancement de graphes flots-de-données d'opérations sur des architectures parallèles homogènes, prenant en compte trois critères : premièrement la minimisation de la longueur de l'ordonnancement (crucial pour les systèmes temps-réels), deuxièmement la maximisation de la fiabilité du système (cruciale pour les systèmes à sûreté critique), et troisièmement la minimisation de la consommation énergétique (cruciale pour les systèmes autonomes). L'algorithme proposé est une heuristique d'ordonnancement de liste, qui utilise la réplication active des opérations pour augmenter la fiabilité et le changement dynamique du voltage et de la fréquence pour minimiser la consommation énergétique
Génération automatique de distributions/ordonnancements temps réel, fiables et tolérants aux fautes
soutenue le 17/12/2004 à l'INRIA Rhônes-Alpes, Grenoble, FranceReactive systems are increasingly used in fields such as automotive, telecommunication, and aeronautic. These systems carry out complex tasks which are often critical. Within catastrophic consequences that could involve a fault in these systems, due to the presence of hardware fault (processor and communication media), it is essential to take into account fault-tolerance in their design. Moreover, several fields require a quantitative evaluation of their system behavior with respect to fault occurrence and fault activation. In order to design dependable systems, I propose in this thesis three design methodologies, based on scheduling theory, and on active and passive software redundancy. These three methodologies allow me to solve the problem of automatic generation of fault-tolerant real-time and reliable schedules. This problem is NP-hard, so these three methodologies are based on list scheduling heuristics. More precisely, the first two methodologies deal with the problem of hardware fault-tolerance (processors and communication media faults), respectively for architectures with point-to-point and buses communication links. The third methodology deals with the problem of quantitative evaluation of schedules in terms of reliability through an original bi-criteria heuristic. These methodologies offer good performances on algorithm and architecture graphs radomly generated.Les systèmes réactifs sont de plus en plus présents dans de nombreux secteurs d´activité tels que l´automobile, les télécommunications et l´aéronautique. Ces systèmes réalisent des tâches complexes qui sont souvent critiques. Au vu des conséquences catastrophiques que pourrait entraîner une défaillance dans ces systèmes, suite à la présence de fautes matérielles (processeurs et média de communication), il est essentiel de prendre en compte la tolérance aux fautes dans leur conception. En outre, plusieurs domaines exigent une évaluation quantitative du comportement de ces systèmes par rapport à l'occurrence et à l'activation des fautes. Afin de concevoir des systèmes sûrs de fonctionnement, j'ai proposé dans cette thèse trois méthodologies de conception basées sur la théorie d'ordonnancement et la redondance active et passive des composants logiciels du système. Ces trois méthodologies permettent de résoudre le problème de la génération automatique de distribution et d'ordonnancements temps réel, fiables et tolérants aux fautes. Ce problème étant NP-difficile, ces trois méthodologies sont basées sur des heuristiques de type ordonnancement de liste. Plus particulièrement, les deux premières méthodologies traitent le problème de la tolérance aux fautes matérielles des processeurs et des media de communication, respectivement pour des architectures à liaisons point-à -point et des architectures à liaison bus. La troisième méthodologie traite le problème de l'évaluation quantitative d'une distribution/ordonnancement en terme de fiabilité à l'aide d'une heuristique bi-critère originale. Ces méthodologies offrent de bonnes performances sur des graphes d'algorithme et d'architecture générés aléatoirement
Scheduling of Real-Time Embedded Systems under Reliability and Power Constraints
International audienceIn this paper, we present a new tri-criteria scheduling heuristic for scheduling data-flow graphs of operations onto parallel homogeneous architectures according to three criteria: first the minimization of the schedule length (crucial for real-time systems), second the maximization of the system reliability (crucial for dependable systems), and third minimizing energy consumption (crucial for autonomous systems). The proposed algorithm is a list scheduling heuristics, It uses the active replication of operations to improve the reliability and the dynamic voltage scaling to minimize the energy consumption.Nous présentons une nouvelle heuristique d'ordonnancement tri-critères pour l'ordonnancement de graphes flots-de-données d'opérations sur des architectures parallèles homogènes, prenant en compte trois critères : premièrement la minimisation de la longueur de l'ordonnancement (crucial pour les systèmes temps-réels), deuxièmement la maximisation de la fiabilité du système (cruciale pour les systèmes à sûreté critique), et troisièmement la minimisation de la consommation énergétique (cruciale pour les systèmes autonomes). L'algorithme proposé est une heuristique d'ordonnancement de liste, qui utilise la réplication active des opérations pour augmenter la fiabilité et le changement dynamique du voltage et de la fréquence pour minimiser la consommation énergétique