22 research outputs found
Direct Graphene Growth on Insulator
Fabrication of graphene devices is often hindered by incompatibility between
the silicon technology and the methods of graphene growth. Exfoliation from
graphite yields excellent films but is good mainly for research. Graphene grown
on metal has a technological potential but requires mechanical transfer. Growth
by SiC decomposition requires a temperature budget exceeding the technological
limits. These issues could be circumvented by growing graphene directly on
insulator, implying Van der Waals growth. During growth, the insulator acts as
a support defining the growth plane. In the device, it insulates graphene from
the Si substrate. We demonstrate planar growth of graphene on mica surface.
This was achieved by molecular beam deposition above 600{\deg}C. High
resolution Raman scans illustrate the effect of growth parameters and substrate
topography on the film perfection. Ab initio calculations suggest a growth
model. Data analysis highlights the competition between nucleation at surface
steps and flat surface. As a proof of concept, we show the evidence of electric
field effect in a transistor with a directly grown channel.Comment: 13 pages, 6 figure
A Graphene-based Hot Electron Transistor
We experimentally demonstrate DC functionality of graphene-based hot electron
transistors, which we call Graphene Base Transistors (GBT). The fabrication
scheme is potentially compatible with silicon technology and can be carried out
at the wafer scale with standard silicon technology. The state of the GBTs can
be switched by a potential applied to the transistor base, which is made of
graphene. Transfer characteristics of the GBTs show ON/OFF current ratios
exceeding 50.000.Comment: 18 pages, 6 figure
Graphene Grown on Ge(001) from Atomic Source
Among the many anticipated applications of graphene, some - such as
transistors for Si microelectronics - would greatly benefit from the
possibility to deposit graphene directly on a semiconductor grown on a Si
wafer. We report that Ge(001) layers on Si(001) wafers can be uniformly covered
with graphene at temperatures between 800{\deg}C and the melting temperature of
Ge. The graphene is closed, with sheet resistivity strongly decreasing with
growth temperature, weakly decreasing with the amount of deposited C, and
reaching down to 2 kOhm/sq. Activation energy of surface roughness is low
(about 0.66 eV) and constant throughout the range of temperatures in which
graphene is formed. Density functional theory calculations indicate that the
major physical processes affecting the growth are: (1) substitution of Ge in
surface dimers by C, (2) interaction between C clusters and Ge monomers, and
(3) formation of chemical bonds between graphene edge and Ge(001), and that the
processes 1 and 2 are surpassed by CH surface diffusion when the C atoms
are delivered from CH. The results of this study indicate that graphene
can be produced directly at the active region of the transistor in a process
compatible with the Si technology
Electron Transport across Vertical Silicon/MoS2/Graphene Heterostructures: Towards Efficient Emitter Diodes for Graphene Base Hot Electron Transistors
Heterostructures comprising silicon, molybdenum disulfide (MoS2), and graphene are investigated with respect to the vertical current conduction mechanism. The measured current-voltage (I-V) characteristics exhibit temperature-dependent asymmetric current, indicating thermally activated charge carrier transport. The data are compared and fitted to a current transport model that confirms thermionic emission as the responsible transport mechanism across devices. Theoretical calculations in combination with the experimental data suggest that the heterojunction barrier from Si to MoS2 is linearly temperature-dependent for T = 200-300 K with a positive temperature coefficient. The temperature dependence may be attributed to a change in band gap difference between Si and MoS2, strain at the Si/MoS2 interface, or different electron effective masses in Si and MoS2, leading to a possible entropy change stemming from variation in density of states as electrons move from Si to MoS2. The low barrier formed between Si and MoS2 and the resultant thermionic emission demonstrated here make the present devices potential candidates as the emitter diode of graphene base hot electron transistors for future high-speed electronics. Copyright © 2020 American Chemical Society
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Electron Transport across Vertical Silicon/MoS2/Graphene Heterostructures: Towards Efficient Emitter Diodes for Graphene Base Hot Electron Transistors
Heterostructures comprising silicon, molybdenum disulfide (MoS2), and graphene are investigated with respect to the vertical current conduction mechanism. The measured current-voltage (I-V) characteristics exhibit temperature-dependent asymmetric current, indicating thermally activated charge carrier transport. The data are compared and fitted to a current transport model that confirms thermionic emission as the responsible transport mechanism across devices. Theoretical calculations in combination with the experimental data suggest that the heterojunction barrier from Si to MoS2 is linearly temperature-dependent for T = 200-300 K with a positive temperature coefficient. The temperature dependence may be attributed to a change in band gap difference between Si and MoS2, strain at the Si/MoS2 interface, or different electron effective masses in Si and MoS2, leading to a possible entropy change stemming from variation in density of states as electrons move from Si to MoS2. The low barrier formed between Si and MoS2 and the resultant thermionic emission demonstrated here make the present devices potential candidates as the emitter diode of graphene base hot electron transistors for future high-speed electronics. Copyright © 2020 American Chemical Society
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A comprehensive study of charge transport in Au-contacted graphene on Ge/Si(001)
We investigate the electronic transport properties of Au-contacted graphene on Ge/Si(001). Kelvin probe force microscopy at room temperature with an additionally applied electric transport field is used to gain a comprehensive understanding of macroscopic transport measurements. In particular, we analyze the contact pads including the transition region, perform local transport measurements in pristine graphene/Germanium, and explore the role of the semiconducting Germanium substrate. We connect the results from these local scale measurements with the macroscopic performance of the device. We find that a graphene sheet on a 2 Όm Ge film carries approximately 10% of the current flowing through the device. Moreover, we show that an electronic transition region forms directly adjacent to the contact pads. This transition region is characterized by a width of >100 Όm and a strongly increased sheet resistance acting as the bottleneck for charge transport. Based on Rutherford backscattering of the contact pads, we suggest that the formation of this transition region is caused by diffusion. © 2020 Author(s)
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Electron Transport across Vertical Silicon/MoS2/Graphene Heterostructures: Towards Efficient Emitter Diodes for Graphene Base Hot Electron Transistors
Heterostructures comprising silicon, molybdenum disulfide (MoS2), and graphene are investigated with respect to the vertical current conduction mechanism. The measured current-voltage (I-V) characteristics exhibit temperature-dependent asymmetric current, indicating thermally activated charge carrier transport. The data are compared and fitted to a current transport model that confirms thermionic emission as the responsible transport mechanism across devices. Theoretical calculations in combination with the experimental data suggest that the heterojunction barrier from Si to MoS2 is linearly temperature-dependent for T = 200-300 K with a positive temperature coefficient. The temperature dependence may be attributed to a change in band gap difference between Si and MoS2, strain at the Si/MoS2 interface, or different electron effective masses in Si and MoS2, leading to a possible entropy change stemming from variation in density of states as electrons move from Si to MoS2. The low barrier formed between Si and MoS2 and the resultant thermionic emission demonstrated here make the present devices potential candidates as the emitter diode of graphene base hot electron transistors for future high-speed electronics. Copyright © 2020 American Chemical Society