23 research outputs found

    Reliable NCO carrier Generators for GPS Receivers

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    International audience—Four strategies for upset protection in NCO (Numerically controlled oscillator) generators are presented and compared in this paper 1. This work is motivated by the increased prevalence of single event upsets due to pro-cess/voltage/temperature variations coupled with the increased advancement of CMOS technology. The occurrence of these upsets in the GPS context (the system under the test in this paper) can lead to a loss of the GPS signal tracking, then the corresponding satellite signal must be re-acquired resulting in high energy expenditure and time delay. It can result also in a corrupted position given by the GPS receiver. Results of experiment using a GPS receiver design are presented in this paper to evaluate the performance of proposed methods. This work can be extended and generated to any system using feedback loops information

    Mixed criticality system scheduling over NoC architectures

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    Nous nous intĂ©ressons dans le cadre de ce travail au challenge consistant Ă  intĂ©grer des systĂšmes Ă  criticitĂ© mixte sur des architectures NoC. Cette intĂ©gration exige l'assurance des contraintes temporelles pour les applications critiques tout en minimisant l'impact de partage de ressources sur les applications non critiques. Afin d'exĂ©cuter des systĂšmes Ă  criticitĂ© mixte sur des architectures NoC, nous avons proposĂ© plusieurs contributions sous la forme d'un routeur, de modĂšles de tĂąches et de communications pour les architectures NoC. Nous avons proposĂ© DAS, un routeur NoC conçu pour exĂ©cuter des systĂšmes Ă  criticitĂ© mixte sur des architectures NoC. Il assure les contraintes temporelles pour les communications critiques tout en limitant la rĂ©servation des ressources pour les communications non critiques. DAS implante deux modes de fonctionnement, deux niveaux de prĂ©emption, deux techniques de contrĂŽle de flux et deux Ă©tages d'arbitrage. Nous avons implantĂ© DAS dans un simulateur de NoC appelĂ© SHoC. Ensuite, DAS a Ă©tĂ© evaluĂ© sur plusieurs niveaux d'abstraction et selon plusieurs critĂšres. Nous avons ensuite proposĂ© DTFM : un modĂšle de tĂąche et de flux pour les systĂšmes temps rĂ©el dĂ©ployĂ©s sur un NoC. À partir du modĂšle de tĂąches, du modĂšle de NoC et du placement des tĂąches, DTFM calcule automatiquement le modĂšle de flux correspondant.Finalement, nous avons proposĂ© ECTM : un modĂšle de communications pour les architectures NoC. ECTM conduit Ă  une analyse d'ordonnancement efficace. Il modĂ©lise les communications sous la forme d'un graphe de tĂąches tout en tenant compte du modĂšle de NoC utilisĂ©. Nous avons implantĂ© ECTM et DTFM dans un simulateur d'ordonnancement appelĂ© Cheddar.This thesis addresses existing challenges that are associated with the implementation of Mixed Criticality Systems over NoC architectures. In such system, we must ensure the timing constraints for critical applications while limiting the bandwidth reservation for them.In order to run Mixed Criticality systems on NoC architectures, we have proposed several contributions in the form of a NoC router, a task and flow model, and a communications model.First, we propose a NoC router called DAS (Double Arbiter and Switching), designed to efficiently run mixed criticality applications on Network On Chip. To enforce MCS requirements, DAS implements automatic mode changes, two levels of preemption, two flow control techniques and two stages of arbitration. We have implemented DAS in the cycle accurate SystemC-TLM simulator SHOC. Then, we have evaluated DAS with several abstraction-level methods. Second, we propose DTFM, a Dual Task and Flow Model in order to overcome the limitation of existent task and flow models. DTFM allows us, from the task model, the NoC model and the task mapping, to compute the corresponding flow model. Finally, we propose a new NoC communication model called Exact Communication Time Model (ECTM) in order to analyze the scheduling of periodic tasks exchanging messages over a NoC. We have implemented our approach in a real-time scheduling simulator called Cheddar

    Vers le support des systÚmes à criticité mixte sur des architectures NoC

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    This thesis addresses existing challenges that are associated with the implementation of Mixed Criticality Systems over NoC architectures. In such system, we must ensure the timing constraints for critical applications while limiting the bandwidth reservation for them.In order to run Mixed Criticality systems on NoC architectures, we have proposed several contributions in the form of a NoC router, a task and flow model, and a communications model.First, we propose a NoC router called DAS (Double Arbiter and Switching), designed to efficiently run mixed criticality applications on Network On Chip. To enforce MCS requirements, DAS implements automatic mode changes, two levels of preemption, two flow control techniques and two stages of arbitration. We have implemented DAS in the cycle accurate SystemC-TLM simulator SHOC. Then, we have evaluated DAS with several abstraction-level methods. Second, we propose DTFM, a Dual Task and Flow Model in order to overcome the limitation of existent task and flow models. DTFM allows us, from the task model, the NoC model and the task mapping, to compute the corresponding flow model. Finally, we propose a new NoC communication model called Exact Communication Time Model (ECTM) in order to analyze the scheduling of periodic tasks exchanging messages over a NoC. We have implemented our approach in a real-time scheduling simulator called Cheddar.Nous nous intĂ©ressons dans le cadre de ce travail au challenge consistant Ă  intĂ©grer des systĂšmes Ă  criticitĂ© mixte sur des architectures NoC. Cette intĂ©gration exige l'assurance des contraintes temporelles pour les applications critiques tout en minimisant l'impact de partage de ressources sur les applications non critiques. Afin d'exĂ©cuter des systĂšmes Ă  criticitĂ© mixte sur des architectures NoC, nous avons proposĂ© plusieurs contributions sous la forme d'un routeur, de modĂšles de tĂąches et de communications pour les architectures NoC. Nous avons proposĂ© DAS, un routeur NoC conçu pour exĂ©cuter des systĂšmes Ă  criticitĂ© mixte sur des architectures NoC. Il assure les contraintes temporelles pour les communications critiques tout en limitant la rĂ©servation des ressources pour les communications non critiques. DAS implante deux modes de fonctionnement, deux niveaux de prĂ©emption, deux techniques de contrĂŽle de flux et deux Ă©tages d'arbitrage. Nous avons implantĂ© DAS dans un simulateur de NoC appelĂ© SHoC. Ensuite, DAS a Ă©tĂ© evaluĂ© sur plusieurs niveaux d'abstraction et selon plusieurs critĂšres. Nous avons ensuite proposĂ© DTFM : un modĂšle de tĂąche et de flux pour les systĂšmes temps rĂ©el dĂ©ployĂ©s sur un NoC. À partir du modĂšle de tĂąches, du modĂšle de NoC et du placement des tĂąches, DTFM calcule automatiquement le modĂšle de flux correspondant.Finalement, nous avons proposĂ© ECTM : un modĂšle de communications pour les architectures NoC. ECTM conduit Ă  une analyse d'ordonnancement efficace. Il modĂ©lise les communications sous la forme d'un graphe de tĂąches tout en tenant compte du modĂšle de NoC utilisĂ©. Nous avons implantĂ© ECTM et DTFM dans un simulateur d'ordonnancement appelĂ© Cheddar

    Work In Progress: A New Task Model for Real-Time DNNs over GPU

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    Recently, deep neural networks (DNNs) have been utilized in real-time systems such as autonomous vehicles, where meeting temporal constraints is essential. However, executing such systems on CPU-GPU architectures can make scheduling analysis challenging due to the added delays caused by computing and memory contention. In addition, classic task models are not directly able to model accurately such systems. In this article, we propose a new task model called DNN Task Model (DTM). This model considers both DNN properties and GPU architecture at the same time. It allows us to distinguish between CPU and GPU tasks, provides information about the DNN application and give more accurate execution time analysis through consideration of data quality. We compute DTM from a source CUDA file and a set of real-time specifications of the system. The proposed model is extensible enough to be adopted to various DNN type applications allowing designer to compare candidate software and GPU architectures. Furthermore, we propose a graph optimization inspired by Tensor-RT

    DTFM: a Flexible Model for Schedulability Analysis of Real-Time Applications on NoC-based Architectures

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    also publiseh in "4th IEEE International Workshop on Real-Time Computing and Distributed systems in Emerging Applications (REACTION)", nov 2016International audienceMany-core processors are expected to be hardware targets to support the execution of real-time applications. In a many-coreprocessor, cores communicate through a Network-On-Chip (NoC), which offers high bandwidth and scalability, but also introduces contentionsleading to additional variability to task execution times. Such contentions also strongly increase the pessimistic trend of worst case execution timeestimation. Consequently, modeling and analysis of network contentions interferences on many-core processors is a challenge to support real-time applications. In this article, we formalize a dual task and flow model called DTFM. From the specification of a real-time applicationcomposed of a set of tasks and their communication dependencies, DTFM allows us to compute flow requirements and to assess predictability ofthe tasks. DTFM is extensible enough to be adapted to various NoCs and task models, allowing designers to compare candidate software and NoCarchitectures. Furthermore, we introduce an original validation approach based on the cross-use of a task level real-time scheduling analysis tooland a cycle-accurate SystemC NoC simulator
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