CSwin2SR: Circular Swin2SR for Compressed Image Super-Resolution

Closed-loop negative feedback mechanism is extensively utilized in automatic control systems and brings about extraordinary dynamic and static performance. In order to further improve the reconstruction capability of current methods of compressed image super-resolution, a circular Swin2SR (CSwin2SR) approach is proposed. The CSwin2SR contains a serial Swin2SR for initial super-resolution reestablishment and circular Swin2SR for enhanced super-resolution reestablishment. Simulated experimental results show that the proposed CSwin2SR dramatically outperforms the classical Swin2SR in the capacity of super-resolution recovery. On DIV2K test and valid datasets, the average increment of PSNR is greater than 1dB and the related average increment of SSIM is greater than 0.006

CMISR: Circular Medical Image Super-Resolution

Classical methods of medical image super-resolution (MISR) utilize open-loop architecture with implicit under-resolution (UR) unit and explicit super-resolution (SR) unit. The UR unit can always be given, assumed, or estimated, while the SR unit is elaborately designed according to various SR algorithms. The closed-loop feedback mechanism is widely employed in current MISR approaches and can efficiently improve their performance. The feedback mechanism may be divided into two categories: local and global feedback. Therefore, this paper proposes a global feedback-based closed-cycle framework, circular MISR (CMISR), with unambiguous UR and SR elements. Mathematical model and closed-loop equation of CMISR are built. Mathematical proof with Taylor-series approximation indicates that CMISR has zero recovery error in steady-state. In addition, CMISR holds plug-and-play characteristic which can be established on any existing MISR algorithms. Five CMISR algorithms are respectively proposed based on the state-of-the-art open-loop MISR algorithms. Experimental results with three scale factors and on three open medical image datasets show that CMISR is superior to MISR in reconstruction performance and is particularly suited to medical images with strong edges or intense contrast

Study, optimization and silicon implementation of a smart high-voltage conditioning circuit for electrostatic vibration energy harvesting system

La récupération de l'énergie des vibrations est un concept relativement nouveau qui peut être utilisé dans l'alimentation des dispositifs embarqués de puissance à micro-échelle avec l'énergie des vibrations omniprésentes dans l environnement. Cette thèse contribue à une étude générale des récupérateurs de l'énergie des vibrations (REV) employant des transducteurs électrostatiques. Un REV électrostatique typique se compose d'un transducteur capacitif, de l'électronique de conditionnement et d un élément de stockage. Ce travail se concentre sur l'examen du circuit de conditionnement auto-synchrone proposé en 2006 par le MIT, qui combine la pompe de charge à base de diodes et le convertisseur DC-DC inductif de type de flyback qui est entraîné par le commutateur. Cette architecture est très prometteuse car elle élimine la commande de grille précise des transistors utilisés dans les architectures synchrones, tandis qu'un commutateur unique se met en marche rarement. Cette thèse propose une analyse théorique du circuit de conditionnement. Nous avons développé un algorithme qui par commutation appropriée de flyback implémente la stratégie de conversion d'énergie optimale en tenant compte des pertes liées à la commutation. En ajoutant une fonction de calibration, le système devient adaptatif pour les fluctuations de l'environnement. Cette étude a été validée par la modélisation comportementale.Une autre contribution consiste en la réalisation de l'algorithme proposé au niveau du circuit CMOS. Les difficultés majeures de conception étaient liées à l'exigence de haute tension et à la priorité de la conception faible puissance. Nous avons conçu un contrôleur du commutateur haute tension de faible puissance en utilisant la technologie AMS035HV. Sa consommation varie entre quelques centaines de nanowatts et quelques microwatts, en fonction de nombreux facteurs - paramètres de vibrations externes, niveaux de tension de la pompe de charge, la fréquence de la commutation de commutateur, la fréquence de la fonction de calibration, etc.Nous avons également réalisé en silicium, fabriqué et testé un commutateur à haute tension avec une nouvelle architecture de l'élévateur de tension de faible puissance. En montant sur des composants discrets de la pompe de charge et du circuit de retour et en utilisant l'interrupteur conçu, nous avons caractérisé le fonctionnement large bande haute-tension du prototype de transducteur MEMS fabriqué à côté de cette thèse à l'ESIEE Paris. Lorsque le capteur est excité par des vibrations stochastiques ayant un niveau d'accélération de 0,8 g rms distribué dans la bande 110-170 Hz, jusqu'à 0,75 W de la puissance nette a été récupérée.Vibration energy harvesting is a relatively new concept that can be used in powering micro-scale power embedded devices with the energy of vibrations omnipresent in the surrounding. This thesis contributes to a general study of vibration energy harvesters (VEHs) employing electrostatic transducers. A typical electrostatic VEH consists of a capacitive transducer, conditioning electronics and a storage element. This work is focused on investigations of the reported by MIT in 2006 auto-synchronous conditioning circuit, which combines the diode-based charge pump and the inductive flyback energy return driven by the switch. This architecture is very promising since it eliminates precise gate control of transistors employed in synchronous architectures, while a unique switch turns on rarely. This thesis addresses the theoretical analysis of the conditioning circuit. We developed an algorithm that by proper switching of the flyback allows the optimal energy conversion strategy taking into account the losses associated with the switching. By adding the calibration function, the system became adaptive to the fluctuations in the environment. This study was validated by the behavioral modeling. Another contribution consists in realization of the proposed algorithm on the circuit level. The major design difficulties were related to the high-voltage requirement and the low-power design priority. We designed a high-voltage analog controller of the switch using AMS035HV technology. Its power consumption varies between several hundred nanowatts and a few microwatts, depending on numerous factors - parameters of external vibrations, voltage levels of the charge pump, frequency of the flyback switching, frequency of calibration function, etc. We also implemented on silicon, fabricated and tested a high-voltage switch with a novel low power level-shifting driver. By mounting on discrete components the charge pump and flyback circuit and employing the proposed switch, we characterized the wideband high-voltage operation of the MEMS transducer prototype fabricated alongside this thesis in ESIEE Paris. When excited with stochastic vibrations having an acceleration level of 0.8 g rms distributed in the band 110-170 Hz, up to 0.75 $\mu$W of net electrical power has been harvested.PARIS-JUSSIEU-Bib.électronique (751059901) / SudocSudocFranceF

Synchronized State in Networks of Digital Phase-Locked Loops

International audienceClock distribution networks of synchronized oscillators are an alternative approach to classical tree-like clock distribution methods. Each node of the network may consist of a phase-locked loop (PLL) trying to match the phase of its neighbors. Then a network of independent oscillators takes the place of the centralized clock source, providing separate clock signals to the physically distant parts of the system. In the discrete case, the digital filter is necessarily operated asynchronously: each operation is triggered by a rising edge of the locally-generated clock, the frequency and phase of which vary as the whole system tries to synchronize. The locking behavior, the synchronous state and the stability conditions of such a system are analyzed. Similarly, the synchronization of an autonomous network of two self-sampled PLLs is studied. Surprisingly, its analysis is much simpler than that of the single PLL

Cascade Decoders-Based Autoencoders for Image Reconstruction

Autoencoders are composed of coding and decoding units, hence they hold the inherent potential of high-performance data compression and signal compressed sensing. The main disadvantages of current autoencoders comprise the following several aspects: the research objective is not data reconstruction but feature representation; the performance evaluation of data recovery is neglected; it is hard to achieve lossless data reconstruction by pure autoencoders, even by pure deep learning. This paper aims for image reconstruction of autoencoders, employs cascade decoders-based autoencoders, perfects the performance of image reconstruction, approaches gradually lossless image recovery, and provides solid theory and application basis for autoencoders-based image compression and compressed sensing. The proposed serial decoders-based autoencoders include the architectures of multi-level decoders and the related optimization algorithms. The cascade decoders consist of general decoders, residual decoders, adversarial decoders and their combinations. It is evaluated by the experimental results that the proposed autoencoders outperform the classical autoencoders in the performance of image reconstruction

A clock network of distributed ADPLLs using an asymmetric comparison strategy

International audienceIn this paper, we describe an architecture of a distributed ADPLL (All Digital Phase Lock Loop) network based on bang-bang phase detectors that are interconnected asymmetrically. It allows an automatic selection between two operating modes (uni- and bidirectional) to avoid mode-locking phenomenon, to accelerate the network convergence and to improve the robustness to possible network failures in comparison to simple unidirectional mode

Control law synthesis for distributed multi-agent systems: Application to active clock distribution networks

International audienceIn this paper, the problem of active clock distribution network synchronization is considered. The network is made of identical oscillators interconnected through a distributed array of phase-locked-loops (PLLs). The problem of the PLL network design is reformulated, from a control theory point of view, as a control law design for a distributed multi-agent system. Inspired by the decentralized control law design methodology using the dissipativity input-output approach, the particular topology of interconnected subsystems is exploited to solve the problem by applying a convex optimization approach involving simple Linear Matrix Inequality (LMI) constraints. After choosing the dissipativity properties which is satisfied by the interconnection matrix, the constraints are transformed into an H ∞ norm constraint on a particular transfer function that must be fulfilled for global stability. Additional constraints on inputs and outputs are introduced in order to ensure the desired performance specifications during the H ∞ control design procedure

Design and VHDL Modeling of All-Digital PLLs

International audienceIn this paper, a VHDL model of a second-order alldigital phase-locked loop (ADPLL) based on bang-bang phase detectors is presented. The developed ADPLL is destined to be a part of a distributed clock generators based on networks of the ADPLL. The paper presents an original model and architecture of a digital multi-bit phase-frequency detector (PFD), and describes in details the VHDL modeling of metastability issues related with asynchronous operation of the digital PFD. This particular architecture of the digital PHD is required by the synchronised operation of the ADPLL network in the context of distributed clock generator. The whole ADPLL model have been validated by purely behavioral (VHDL) and mixed simulation, in which the digital PFD detector was represented by its transistorlevel model

Optimization and AMS Modeling for Design of an Electrostatic Vibration Energy Harvester’s Conditioning Circuit with an Auto-Adaptive Process to the External Vibration Changes

Electrostatic transducers for vibration energy scavenging have been an object to numerous studies, but are still facing major issues relating to their conditioning circuit. One of the most popular ones uses a charge pump and a flyback circuit based on a Buck DC-DC converter (Fig. 1). A commutation between the energy accumulation in the charge pump and the recharge of the buffer capacitor Cres is assured by a switch which is the major bottleneck in the energy harvester circuit. The commutation timing of the switch determines the efficiency of the energy harvesting. In previous papers [1] the switch commutates periodically with some fixed duty ratio. However, this solution is not appropriate when the environment parameters, e.g. the vibration frequency, change. We found that the switching should be ordered by the internal state of the circuit, an not by some fixed timing scenario. We presents how to find the optimal operation mode of the harvester. To validate the study, the system was modeled using a mixed VHDL-AMS - ELDO model