29 research outputs found

    Neurocognitive and Neurophysiological Functions Related to ACL Injury:A Framework for Neurocognitive Approaches in Rehabilitation and Return-to-Sports Tests

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    Context: Only 55% of the athletes return to competitive sports after an anterior cruciate ligament (ACL) injury. Athletes younger than 25 years who return to sports have a second injury rate of 23%. There may be a mismatch between rehabilitation contents and the demands an athlete faces after returning to sports. Current return-to-sports (RTS) tests utilize closed and predictable motor skills; however, demands on the field are different. Neurocognitive functions are essential to manage dynamic sport situations and may fluctuate after peripheral injuries. Most RTS and rehabilitation paradigms appear to lack this aspect, which might be linked to increased risk of second injury. Objective: This systematic and scoping review aims to map existing evidence about neurocognitive and neurophysiological functions in athletes, which could be linked to ACL injury in an integrated fashion and bring an extensive perspective to assessment and rehabilitation approaches. Data Sources: PubMed and Cochrane databases were searched to identify relevant studies published between 2005 and 2020 using the keywords ACL, brain, cortical, neuroplasticity, cognitive, cognition, neurocognition, and athletes. Study Selection: Studies investigating either neurocognitive or neurophysiological functions in athletes and linking these to ACL injury regardless of their design and technique were included. Study Design: Systematic review. Data Extraction: The demographic, temporal, neurological, and behavioral data revealing possible injury-related aspects were extracted and summarized. Results: A total of 16 studies were included in this review. Deficits in different neurocognitive domains and changes in neurophysiological functions could be a predisposing risk factor for, or a consequence caused by, ACL injuries. Conclusion: Clinicians should view ACL injuries not only as a musculoskeletal but also as a neural lesion with neurocognitive and neurophysiological aspects. Rehabilitation and RTS paradigms should consider these changes for assessment and interventions after injury

    Electronic properties of graphene nanoribbons with defects

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    © 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Graphene nanoribbons (GNRs) are the most important emerging Graphene structures for nanoelectronic and sensor applications. GNRs with perfect lattices have been extensively studied, but fabricated GNRs contain lattice defects the effect of which on their electronic properties has not been studied extensively enough. In this paper, we apply the Non-Equilibrium Green's function (NEGF) method combined with tight-binding Hamiltonians to investigate the effect of lattice defects on the conductance of GNRs. We specifically study, butterfly shaped GNRs, which operate effectively as switches, and have been used in CMOS-like architectures. The cases of the most usual defects, namely the single and double vacancy have been analytically examined. The effect of these vacancies was computed by placing them in different regions and with various numbers on GNR nano-devices, namely edges, main body, contacts and narrow regions. The computation results are presented in the form of energy dispersion diagrams as well as diagrams of maximum conductance as a function of the number of lattice defects. We also present results on the defect tolerance of the butterfly shaped GNR devices.Peer ReviewedPostprint (author's final draft

    Current characteristics of defective GNR nanoelectronic devices

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    The most promising Graphene structures for the development of nanoelectronics and sensor applications are Graphene nanoribbons (GNRs). GNRs with perfect lattices have been extensively investigated in the research literature; however, fabricated GNRs may still suffering from lattice flaws, the possible effect of which, on the operation of the circuitry comprised by GNR based devices, has not attracted significant interest. In this paper, we investigate the effect of lattice defects on the operational behavior of GNRs using the Non-Equilibrium Green's function (NEGF) method combined with tight-binding Hamiltonians targeting to the resulting nanoelectronic devices and circuits functionalities. We focus on butterfly-shaped GNRs, which have been proven to successfully function as switches that can be used as building blocks for simple Boolean gates and logic circuits. Analyses of the most common defects, namely the single and double vacancies, have been adequately performed. The effect of these vacancies was investigated by inserting them in various places and concentrations on the corresponding GNR based nano-devices. The computation results indicate the effect on lattice defects on the important operational device parameters including the leakage current, ION/IOFF and, finally, current density, which will determine the viability of GNR computing circuits.Postprint (published version

    MemCA: all-memristor design for deterministic and probabilistic cellular automata hardware realization

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    © 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksInspired by the behavior of natural systems, Cellular Automata (CA) tackle the demanding long-distance information transfer of conventional computers by the massive parallel computation performed by a set of locally-coupled dynamical nodes. Although CA are envisioned as powerful deterministic computers, their intrinsic capabilities are expanded after the memristor’s probabilistic switching is introduced into CA cells, resulting in new hybrid deterministic and probabilistic memristor-based CA (MemCA). In the proposed MemCA hardware realization, memristor devices are incorporated in both the cell and rule modules, composing the very first all-memristor CA hardware, designed with mixed CMOS/Memristor circuits. The proposed implementation accomplishes high operating speed and reduced area requirements, exploiting also memristor as an entropy source in every CA cell. MemCA’s functioning is showcased in deterministic and probabilistic operation, which can be externally modified by the selection of programming voltage amplitude, without changing the design. Also, the proposed MemCA system includes a reconfigurable rule module implementation that allows for spatial and temporal rule inhomogeneity.Peer ReviewedPostprint (published version

    The ANZUS Treaty during the Cold War: a reinterpretation of U.S. diplomacy in the Southwest Pacific

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    This article explains the origins of the Australia–New Zealand–United States (ANZUS) Treaty by highlighting U.S. ambitions in the Pacific region after World War II. Three clarifications to the historiography merit attention. First, an alliance with Australia and New Zealand reflected the pursuit of U.S. interests rather than the skill of antipodean diplomacy. Despite initial reservations in Washington, geostrategic anxiety and economic ambition ultimately spurred cooperation. The U.S. government's eventual recourse to coercive diplomacy against the other ANZUS members, and the exclusion of Britain from the alliance, substantiate claims of self-interest. Second, the historiography neglects the economic rationale underlying the U.S. commitment to Pacific security. Regional cooperation ensured the revival of Japan, the avoidance of discriminatory trade policies, and the stability of the Bretton Woods monetary system. Third, scholars have unduly played down and misunderstood the concept of race. U.S. foreign policy elites invoked ideas about a “White Man's Club” in Asia to obscure the pursuit of U.S. interests in the region and to ensure British exclusion from the treaty

    Nanoparticles for Electronic Devices

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    In this thesis, the synthesis of semiconductor nanocrystals (Si-ncs) embedded into thin silicon dioxide layers was studied, in order to fabricate electronic memory devices where the Si-ncs should act as discrete charge storage nodes. The synthesis of Si-ncs was achieved by very low energy ion beam synthesis (0.65 – 2 keV). Ion implantation experiments were performed in laboratory and industrial implanters. Results from devices prepared by the industrial implanter were reliable for both quantitative and qualitative results because the industrial implantation system (a) has a monoenergetic ion beam and (b) has a charge neutralization system. TEM studies on samples fabricated by an industrial implantation system revealed that (a) the fabrication of a Si-ncs 2D array occurred deeper into the silicon dioxide matrix as the implantation energy increased and (b) elongated Si-ncs that were not mutually isolated and exchange charges were formed by increase of the implantation dose. In addition, it was found that the thinnest device grade silicon dioxide layer where Si-ncs could be achieved was 7nm. The best implantation conditions were 1keV energy and 21016Si+cm-2 implantation dose. Experimental studies on the optimization of the memory window and its retention time (10 years standard) revealed that these could be achieved by thermal annealing at 950 οC for 30min in a mixture of Ν2/Ο2 with [Ο2]/[N2+O2] in the range 1.5%-2% per volume using 7nm thick silicon dioxide layers implanted with 1keV 21016Si+cm-2. Increase of the oxygen concentration or the annealing time resulted to the enhanced oxidation of the Si-ncs and the substrate, the reduction of the Si-ncs surface concentration and tunneling conduction current causing the elimination of the charge storage effects. Combined electrical characterization and structural TEM studies lead to a model describing of the role of oxygen during the thermal annealing process and thus the dose dependent action of oxygen was determined. Following these optimized processing conditions, prototype memory cells were fabricated in a laboratory (1μm CMOS technology, 100mm Si wafer) and a manufacturing (1μm CMOS 0.15 technology, 200mm Si wafer) environment. The fabricated prototypes have (a) a highly uniform density of Si-ncs and (b) a highly uniform memory window, independently on the cell dimensions. The fabricated memory cells have nonvolatile properties (10-years retention time at 150οC) and their pulse operation was achieved utilizing low program/erase pulse voltages (+9V/-7V) with competitive pulse duration times (10ms) compared to the conventional floating gate memories. Further experiments on the charge retention characteristics revealed that the electrons (programming state) were stored at deep traps into the Si-ncs, while holes are stored either at shallow states into the Si-ncs or oxide traps. Additionally, it was found that proper selection of the implantation and annealing conditions could lead to the fabrication of memory devices with low voltage (+7V/-7V) and fast (1μs) operating characteristics, suitable for RAM applications with 11 days retention time at 85 οC. Finally, the parasitic transistor action in laboratory and industrial memory cells was investigated. It was found that the parasitic transistor formed at the channel edges of the cells could be responsible for parasitic memory effects in Si-ncs memory devices. The effect was maximized for cells with deep submicronic gate lengths where the parasitic memory window was similar to the intrinsic one mainly because the cell’s transfer characteristics were governed by the action of parasitic transistor.Στην παρούσα διατριβή διερευνήθηκε η σύνθεση ημιαγωγικών νανοκρυσταλιτών πυριτίου (νκ-Si) εντός πολύ λεπτών υμενίων διοξειδίου του πυριτίου, με σκοπό την κατασκευή ηλεκτρονικών διατάξεων μνήμης, στις οποίες οι νκ-Si χρησιμοποιούνται ως διακριτές θέσεις αποθήκευσης ηλεκτρικών φορτίων. Η σύνθεση των νκ-Si πραγματοποιήθηκε χρησιμοποιώντας ιοντική εμφύτευση πολύ χαμηλής ενέργειας (0.65-2keV).Έγιναν πειράματα εμφύτευσης σε εργαστηριακό και βιομηχανικό εμφυτευτή. Στα πειράματα με βιομηχανικό εμφυτευτή μελέτες TEM απέδειξαν ότι (α) αύξηση της ενέργειας προκαλεί αύξηση του βάθους σχηματισμού του διδιάστατου στρώματος σχηματισμού των νκ-Si και (β) αύξηση της δόσης εμφύτευσης οδηγεί στο σχηματισμού νησίδων πυριτίου οι οποίες μπορούν να ανταλλάσσουν φορτία μεταξύ τους. Η καταλληλότερη ενέργεια εμφύτευσης είναι 1keV και η καταλληλότερη δόση 21016Si+cm-2. Με την βοήθεια ηλεκτρικών μεθόδων χαρακτηρισμού των πυκνωτών MOS προσδιορίσθηκε ο ρόλος της ενέργειας και της δόσης εμφύτευσης στα φαινόμενα μνήμης και προσδιορίσθηκε ο ρόλος των πλεοναζόντων ατόμων Si στην αγωγιμότητα των οξειδίων. Μελέτες για την βελτιστοποίηση του παραθύρου μνήμης με ταυτόχρονη διατήρησή του για πάρα πολύ μεγάλο χρονικό διάστημα (10 χρόνια) έδειξαν ότι τα καλύτερα αποτελέσματα επιτυγχάνονται κατά την θερμική ανόπτηση στους 950ο C σε αέριο μίγμα Ν2/Ο2 με συγκέντρωση Ο2 1.5%-2% κατά όγκο για 30min για οξείδια πάχους 7nm εμφυτευμένα με 21016Si+cm-2 ενέργειας 1keV. Αύξηση της συγκέντρωσης οξυγόνου ή του χρόνου ανόπτησης είχαν σαν αποτέλεσμα την αυξημένη οξείδωση των νκ-Si και του υποστρώματος, την μείωση της συγκέντρωσής τους και της αγωγιμότητας φαινομένου σήραγγας προκαλώντας την εξαφάνιση των φαινομένων μνήμης. Ακολουθώντας τις βέλτιστες συνθήκες επεξεργασίας που προσδιορίσθηκαν στα προκαταρκτικά πειράματα, έγινε η κατασκευή εργαστηριακών (τεχνολογία CMOS 1μm, 100mm δισκία Si) και βιομηχανικών (τεχνολογία CMOS 0.15μm, 200mm δισκία Si) πρωτοτύπων κυττάρων μνήμης MOSFET νκ-Si. Τα κύτταρα μνήμης MOSFET νκ-Si που κατασκευάσθηκαν πληρούν τις προϋποθέσεις για την κατασκευή ηλεκτρονικών μνημών με χαρακτηριστικά μη-προσωρινής διατήρησης της πληροφορίας (περισσότερο από 10 χρόνια στους 150οC) σε χαμηλές τάσεις λειτουργίας (+9V/-7V) και ανταγωνιστικούς χρόνους λειτουργίας (10ms) σχετικά με τις συμβατικές μνήμες αιωρούμενης πύλης. Πειράματα για τη μελέτη της απώλειας του αποθηκευμένου φορτίου σε υψηλές θερμοκρασίες απέδειξαν ότι η αποθήκευση των ηλεκτρονίων πραγματοποιείται σε βαθιές στάθμες εντός των νκ-Si, ενώ των οπών σε ρηχές στάθμες ή σε παγίδες του οξειδίου με πάρα πολύ μικρή ενέργεια ενεργοποίησης. Επιπλέον, αποδείχθηκε ότι με την επιλογή των κατάλληλων συνθηκών ανόπτησης και εμφύτευσης είναι δυνατό να κατασκευαστούν διατάξεις μνήμης οι οποίες προορίζονται για εφαρμογές γρήγορης (1μs) μη προσωρινής (11ημέρες στους 85οC) αποθήκευσης πληροφορίας με μικρές τάσεις λειτουργίας (+7V/-7V). Τέλος, διερευνήθηκε η δράση του παρασιτικού τρανζίστορ το οποίο εμφανίζεται για διαφορετικούς λόγους τόσο στα εργαστηριακά όσο και στα βιομηχανικά πρωτότυπα. Αποδείχθηκε ότι σε υπομικρονικές διατάξεις μνήμης νκ-Si τα παρασιτικά φαινόμενα μνήμης είναι εξίσου σημαντικά με τα ενδογενή εξαιτίας της κυριαρχίας του παρασιτικού τρανζίστορ στις χαρακτηριστικές μεταφοράς

    Nanoparticles for electronic devices

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    358 σ.Στην παρούσα διατριβή διερευνήθηκε η σύνθεση ημιαγωγικών νανοκρυσταλιτών πυριτίου (νκ-Si) εντός πολύ λεπτών υμενίων διοξειδίου του πυριτίου, με σκοπό την κατασκευή ηλεκτρονικών διατάξεων μνήμης, στις οποίες οι νκ-Si χρησιμοποιούνται ως διακριτές θέσεις αποθήκευσης ηλεκτρικών φορτίων. Η σύνθεση των νκ-Si πραγματοποιήθηκε χρησιμοποιώντας ιοντική εμφύτευση πολύ χαμηλής ενέργειας (0.65-2keV).Έγιναν πειράματα εμφύτευσης σε εργαστηριακό και βιομηχανικό εμφυτευτή. Στα πειράματα με βιομηχανικό εμφυτευτή μελέτες TEM απέδειξαν ότι (α) αύξηση της ενέργειας προκαλεί αύξηση του βάθους σχηματισμού του διδιάστατου στρώματος σχηματισμού των νκ-Si και (β) αύξηση της δόσης εμφύτευσης οδηγεί στο σχηματισμού νησίδων πυριτίου οι οποίες μπορούν να ανταλλάσσουν φορτία μεταξύ τους. Η καταλληλότερη ενέργεια εμφύτευσης είναι 1keV και η καταλληλότερη δόση 21016Si+cm-2. Με την βοήθεια ηλεκτρικών μεθόδων χαρακτηρισμού των πυκνωτών MOS προσδιορίσθηκε ο ρόλος της ενέργειας και της δόσης εμφύτευσης στα φαινόμενα μνήμης και προσδιορίσθηκε ο ρόλος των πλεοναζόντων ατόμων Si στην αγωγιμότητα των οξειδίων. Μελέτες για την βελτιστοποίηση του παραθύρου μνήμης με ταυτόχρονη διατήρησή του για πάρα πολύ μεγάλο χρονικό διάστημα (10 χρόνια) έδειξαν ότι τα καλύτερα αποτελέσματα επιτυγχάνονται κατά την θερμική ανόπτηση στους 950ο C σε αέριο μίγμα Ν2/Ο2 με συγκέντρωση Ο2 1.5%-2% κατά όγκο για 30min για οξείδια πάχους 7nm εμφυτευμένα με 21016Si+cm-2 ενέργειας 1keV. Αύξηση της συγκέντρωσης οξυγόνου ή του χρόνου ανόπτησης είχαν σαν αποτέλεσμα την αυξημένη οξείδωση των νκ-Si και του υποστρώματος, την μείωση της συγκέντρωσής τους και της αγωγιμότητας φαινομένου σήραγγας προκαλώντας την εξαφάνιση των φαινομένων μνήμης. Ακολουθώντας τις βέλτιστες συνθήκες επεξεργασίας που προσδιορίσθηκαν στα προκαταρκτικά πειράματα, έγινε η κατασκευή εργαστηριακών (τεχνολογία CMOS 1μm, 100mm δισκία Si) και βιομηχανικών (τεχνολογία CMOS 0.15μm, 200mm δισκία Si) πρωτοτύπων κυττάρων μνήμης MOSFET νκ-Si. Τα κύτταρα μνήμης MOSFET νκ-Si που κατασκευάσθηκαν πληρούν τις προϋποθέσεις για την κατασκευή ηλεκτρονικών μνημών με χαρακτηριστικά μη-προσωρινής διατήρησης της πληροφορίας (περισσότερο από 10 χρόνια στους 150οC) σε χαμηλές τάσεις λειτουργίας (+9V/-7V) και ανταγωνιστικούς χρόνους λειτουργίας (10ms) σχετικά με τις συμβατικές μνήμες αιωρούμενης πύλης. Πειράματα για τη μελέτη της απώλειας του αποθηκευμένου φορτίου σε υψηλές θερμοκρασίες απέδειξαν ότι η αποθήκευση των ηλεκτρονίων πραγματοποιείται σε βαθιές στάθμες εντός των νκ-Si, ενώ των οπών σε ρηχές στάθμες ή σε παγίδες του οξειδίου με πάρα πολύ μικρή ενέργεια ενεργοποίησης. Επιπλέον, αποδείχθηκε ότι με την επιλογή των κατάλληλων συνθηκών ανόπτησης και εμφύτευσης είναι δυνατό να κατασκευαστούν διατάξεις μνήμης οι οποίες προορίζονται για εφαρμογές γρήγορης (1μs) μη προσωρινής (11ημέρες στους 85οC) αποθήκευσης πληροφορίας με μικρές τάσεις λειτουργίας (+7V/-7V). Τέλος, διερευνήθηκε η δράση του παρασιτικού τρανζίστορ το οποίο εμφανίζεται για διαφορετικούς λόγους τόσο στα εργαστηριακά όσο και στα βιομηχανικά πρωτότυπα. Αποδείχθηκε ότι σε υπομικρονικές διατάξεις μνήμης νκ-Si τα παρασιτικά φαινόμενα μνήμης είναι εξίσου σημαντικά με τα ενδογενή εξαιτίας της κυριαρχίας του παρασιτικού τρανζίστορ στις χαρακτηριστικές μεταφοράς.In this thesis, the synthesis of semiconductor nanocrystals (Si-ncs) embedded into thin silicon dioxide layers was studied, in order to fabricate electronic memory devices where the Si-ncs should act as discrete charge storage nodes. The synthesis of Si-ncs was achieved by very low energy ion beam synthesis (0.65 – 2 keV). Ion implantation experiments were performed in laboratory and industrial implanters. Results from devices prepared by the industrial implanter were reliable for both quantitative and qualitative results because the industrial implantation system (a) has a monoenergetic ion beam and (b) has a charge neutralization system. TEM studies on samples fabricated by an industrial implantation system revealed that (a) the fabrication of a Si-ncs 2D array occurred deeper into the silicon dioxide matrix as the implantation energy increased and (b) elongated Si-ncs that were not mutually isolated and exchange charges were formed by increase of the implantation dose. In addition, it was found that the thinnest device grade silicon dioxide layer where Si-ncs could be achieved was 7nm. The best implantation conditions were 1keV energy and 21016Si+cm-2 implantation dose. Experimental studies on the optimization of the memory window and its retention time (10 years standard) revealed that these could be achieved by thermal annealing at 950 οC for 30min in a mixture of Ν2/Ο2 with [Ο2]/[N2+O2] in the range 1.5%-2% per volume using 7nm thick silicon dioxide layers implanted with 1keV 21016Si+cm-2. Increase of the oxygen concentration or the annealing time resulted to the enhanced oxidation of the Si-ncs and the substrate, the reduction of the Si-ncs surface concentration and tunneling conduction current causing the elimination of the charge storage effects. Combined electrical characterization and structural TEM studies lead to a model describing of the role of oxygen during the thermal annealing process and thus the dose dependent action of oxygen was determined. Following these optimized processing conditions, prototype memory cells were fabricated in a laboratory (1μm CMOS technology, 100mm Si wafer) and a manufacturing (1μm CMOS 0.15 technology, 200mm Si wafer) environment. The fabricated prototypes have (a) a highly uniform density of Si-ncs and (b) a highly uniform memory window, independently on the cell dimensions. The fabricated memory cells have nonvolatile properties (10-years retention time at 150οC) and their pulse operation was achieved utilizing low program/erase pulse voltages (+9V/-7V) with competitive pulse duration times (10ms) compared to the conventional floating gate memories. Further experiments on the charge retention characteristics revealed that the electrons (programming state) were stored at deep traps into the Si-ncs, while holes are stored either at shallow states into the Si-ncs or oxide traps. Additionally, it was found that proper selection of the implantation and annealing conditions could lead to the fabrication of memory devices with low voltage (+7V/-7V) and fast (1μs) operating characteristics, suitable for RAM applications with 11 days retention time at 85 οC. Finally, the parasitic transistor action in laboratory and industrial memory cells was investigated. It was found that the parasitic transistor formed at the channel edges of the cells could be responsible for parasitic memory effects in Si-ncs memory devices. The effect was maximized for cells with deep submicronic gate lengths where the parasitic memory window was similar to the intrinsic one mainly because the cell’s transfer characteristics were governed by the action of parasitic transistor.Παναγιώτης Σ. Δημητράκη

    Analysis of random telegraph noise in resistive memories: The case of unstable filaments

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    Through Random Telegraph Noise (RTN) analysis, valuable information can be provided about the role of defect traps in fine tuning and reading of the state of a nanoelectronic device. However, time domain analysis techniques exhibit their limitations in case where unstable RTN signals occur. These instabilities are a common issue in Multi-Level Cells (MLC) of resistive memories (ReRAM), when the tunning protocol fails to find a perfectly stable resistance state, which in turn brings fluctuations to the RTN signal especially in long time measurements and cause severe errors in the estimation of the distribution of time constants of the observed telegraphic events, i.e., capture/emission of carriers from traps. In this work, we analyze the case of the unstable filaments in silicon nitride-based ReRAM devices and propose an adaptive filter implementing a moving-average detrending method in order to flatten unstable RTN signals and increase sufficiently the accuracy of the conducted measurements. The τe and τc emission/capture time constants of the traps, respectively, are then calculated and a cross-validation through frequency domain analysis (Lorentzian fitting) was performed proving that the proposed method is accurate

    Impact of Line Edge Roughness on ReRAM Uniformity and Scaling

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    We investigate the effects of Line Edge Roughness (LER) of electrode lines on the uniformity of Resistive Random Access Memory (ReRAM) device areas in cross-point architectures. To this end, a modeling approach is implemented based on the generation of 2D cross-point patterns with predefined and controlled LER and pattern parameters. The aim is to evaluate the significance of LER in the variability of device areas and their performances and to pinpoint the most critical parameters and conditions. It is found that conventional LER parameters may induce >10% area variability depending on pattern dimensions and cross edge/line correlations. Increased edge correlations in lines such as those that appeared in Double Patterning and Directed Self-assembly Lithography techniques lead to reduced area variability. Finally, a theoretical formula is derived to explain the numerical dependencies of the modeling method
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