46 research outputs found

    Investigation of Tm<sub>2</sub>O<sub>3</sub> As a Gate Dielectric for Ge MOS Devices

    Get PDF
    Germanium (Ge) has been intensively investigated as a high-mobility channel material alternative to silicon (Si). A high quality Ge/dielectric interface with interface state density Dit compared to Si is required for competitive device performance. GeO2 has been identified as potential candidate for an interfacial layer (IL) due to effective Ge surface passivation with Dit in the range of 1011 cm-2eV-1 [1]. However, in order to achieve scaled effective oxide thickness (EOT) a combination of GeO2 IL and a high-k dielectric is needed. Low interface state density in the range of 1011 cm-2eV-1 has been achieved while employing Al2O3 barrier [2] as well as rare earth oxides such as Y2O3 [3]. Rare-earth thulium oxide (Tm2O3) provides high dielectric constant k~16 [4] and sufficient valence (3.05 eV) and conduction (2.05 eV) band offsets [5] for a high-k dielectric layer on Ge. In this work Ge/GeOx/Tm2O3 interface quality and the impact of post deposition anneal ambient are investigated. Metal oxide semiconductor (MOS) capacitors were fabricated to evaluate Ge/GeOx/Tm2O3 gate stacks. After n-Ge substrate clean (acetone, propanol and O2 plasma) and native germanium oxide removal with aqueous HF and HCl solutions the samples were immediately loaded into the rapid thermal anneal (RTA) chamber where oxidation was carried out at 550 °C for 5 s to 5 min. The temperature in the chamber is controlled by a pyrometer which is calibrated to a Si wafer, and oxidation is performed by placing a Ge substrate piece on a Si carrier wafer. The temperature of the Ge sample is thus lower than that of the Si wafer. After oxidation the samples were loaded to atomic layer deposition (ALD) chamber where 40 cycles (~7 nm) of Tm2O3 were deposited using TmCp3 and H2O as precursors. Then Ge/GeO2/Tm2O3 gate stacks were annealed in different ambient (O2, O3, N2 and H2/N2) and temperatures (400 - 550 °C). Reference samples without Tm2O3 deposition or without post deposition anneal (PDA) were also fabricated. Al gate metal was deposited by physical vapor deposition and patterned. MOS capacitors were electrically characterized with capacitance-voltage (CV) measurements. Interface state density in the midgap was evaluated from CV curves using a method described in [6]. X-ray photoelectron spectroscopy (XPS) was performed on some samples using Al Kα X-ray (1486.6 eV) source and PSP Vacuum Technology electron energy analyser. Electrical properties of thermally grown Ge/GeO2 interfaces were evaluated and low interface state density Dit &lt; 5·1011 cm-2eV-1 in the midgap was extracted from CV measurements. The influence of Tm2O3 deposition on high-quality Ge/GeO2 interfaces was then determined. A degradation of the interface quality after the deposition was observed as displayed in Fig. 1. Dit is higher for thinner underlying GeOx layer and seems to saturate to ~9·1011 cm-2eV-1 for thick layers. A series of post deposition anneals in different ambient and temperatures were performed on Ge/GeOx/Tm2O3 gate stacks in order to investigate the influence on the interface state density and capacitance equivalent thickness (CET). The results are shown in Fig. 2. It can be seen that a temperature of 500 °C or higher and O2 ambient is needed to sufficiently reduce Dit, when values as low as 2·1011 cm-2eV-1 can be reached. XPS measurement was performed on Ge/GeOx/Tm2O3 gate stack with O2 PDA at 500 °C and the obtained spectrum is shown in Fig. 3. The difference between the GeOx 3d5/2 peak and Ge0 3d5/2 peak is 2.7 eV which corresponds to Ge3+ oxidation state. This result is consistent with previously reported XPS results on Ge/GeOx/Al2O3 stacks [7] and suggests that Ge3+ oxidation state provides the low Dit values of Ge/GeOx/Tm2O3 gate stacks. Tm2O3 integrated with GeO2 and O2 PDA is a viable candidate for Ge MOS devices due to low interface state density of ~2·1011 cm-2eV-1 which is correlated to Ge3+ oxidation state. A further investigation of O2 PDA time in terms of the trade-off between Dit and CET will be reported. References [1] H. Matsubara et al., Appl. Phys. Lett., vol. 93, no. 3, p. 32104, 2008. [2] R. Zhang et al., IEEE Trans. Electron Devices, vol. 61, no. 2, pp. 416–422, 2014. [3] C. H. Lee et al., Tech. Dig. - Int. Electron Devices Meet. IEDM, pp. 40–43, 2013. [4] E. Dentoni Litta et al., J. Electrochem. Soc., vol. 160, no. 11, pp. D538–D542, 2013. [5] I. Z. Mitrovic et al., J. Appl. Phys., 2015. [6] L. Zurauskaite et al., EDTM, pp. 164–166, 2017. [7] X. Wang et al., Appl. Surf. Sci., vol. 357, pp. 1857–1862, 2015. Figure 1 <jats:p /

    Accurate band alignment of sputtered Sc<sub>2</sub>O<sub>3</sub> on GaN for high electron mobility transistor applications

    Get PDF
    Abstract Sc2O3 is a promising gate dielectric for surface passivation in GaN-based devices. However, the interface quality and band alignment of sputtered Sc2O3 on GaN has not been fully explored. In this work, x-ray photoelectron spectroscopy (XPS) and variable angle spectroscopic ellipsometry were performed to extract the discontinuities in the valence and conduction bands of the Sc2O3/GaN system. Sc2O3 films were deposited on GaN using radio frequency sputtering. The valence band offset of Sc2O3/GaN was determined to be 0.76 ± 0.1 eV using Kraut’s method. The Sc2O3 band gap of 6.03 ± 0.25 eV was measured using O 1s energy loss spectroscopy. The electron affinity measurements of GaN and Sc2O3 using XPS secondary electron cut-off spectra provided an additional degree of accuracy to the derived band line-up for the Sc2O3/GaN interface. The band alignment results were compared with literature values of band offsets determined experimentally and theoretically for differently grown Sc2O3 films on GaN.</jats:p

    (Invited) Band Line-up of High-k Oxides on GaN

    Get PDF
    We present comprehensive experimental work on TixAl1-xOy (with x = 9%, 16%, 25%, 36%, 100%) and GaxAl1-xOy (x = 5%, 20%, 80% and 95%) fabricated using atomic layer deposition with the aim of achieving favorable band alignment with GaN for device applications. The permittivity, k, has been found to be enhanced from ~10 for 9% Ti to 76 for TiO2, but brings unfavorable band line-up and a small conduction band offset (&lt; 0.1 eV) with GaN for all Ti% studied. On the other hand, GaxAl1-xOy (x = 5%, 20%) films show substantial increase of the band gap from 4.5 eV for Ga2O3 to 5.5 eV for x = 5% Ga and 6.0 eV for x = 20% Ga in mixed oxides and a strong suppression of leakage current in associated metal insulator semiconductor (MIS) capacitors.</jats:p

    Density Functional Theory and Experimental Determination of Band Gaps and Lattice Parameters in Kesterite Cu2ZnSn(SxSe1-x)4

    Get PDF
    The structures and band gaps of copper-zinc-tin selenosulfides (CZTSSe) are investigated for a range of anion compositions through experimental analysis and complementary first-principles simulations. The band gap was found to be extremely sensitive to the Sn-anion bond length, with an almost linear correlation with the average Sn-anion bond length in the mixed anion phase Cu2ZnSn(S x Se1-x)4. Therefore, an accurate prediction of band gaps using first-principles methods requires the accurate reproduction of the experimental bond lengths. This is challenging for many widely used approaches that are suitable for large supercells. The HSE06 functional was found to predict the structure and band gap in good agreement with the experiment but is computationally expensive for large supercells. It was shown that a geometry optimization with the MS2 meta-GGA functional followed by a single point calculation of electronic properties using HSE06 is a reasonable compromise for modeling larger supercells that are often unavoidable in the study of point and extended defects

    Colloidal dual-band gap cell for photocatalytic hydrogen generation

    Get PDF
    We report that the internal quantum efficiency for hydrogen generation in spherical, Pt-decorated CdS nanocrystals can be tuned by quantum confinement, resulting in higher efficiencies for smaller than for larger nanocrystals (17.3% for 2.8 nm and 11.4% for 4.6 nm diameter nanocrystals). We attribute this to a larger driving force for electron and hole transfer in the smaller nanocrystals. The larger internal quantum efficiency in smaller nanocrystals enables a novel colloidal dual-band gap cell utilising differently sized nanocrystals and showing larger external quantum efficiencies than cells with only one size of nanocrystals (9.4% for 2.8 nm particles only and 14.7% for 2.8 nm and 4.6 nm nanocrystals). This represents a proof-of-principle for future colloidal tandem cell

    Direct Silicon Heterostructures With Methylammonium Lead Iodide Perovskite for Photovoltaic Applications

    Get PDF
    We investigated the formation of photovoltaic (PV) devices using direct n-Si/MAPI (methylammonium lead tri-iodide) two-sided heterojunctions for the first time (as a possible alternative to two-terminal tandem devices) in which charge might be generated and collected from both the Si and MAPI. Test structures were used to establish that the n-Si/MAPI junction was photoactive and that spiro-OMeTAD acted as a “pinhole blocking” layer in n-Si/MAPI devices. Two-terminal “substrate” geometry devices comprising Al/n-Si/MAPI/spiro-OMeTAD/Au were fabricated and the effects of changing the thickness of the semitransparent gold electrode and the silicon resistivity were investigated. External quantum efficiency and capacitance–voltage measurements determined that the junction was one-sided in the silicon—and that the majority of the photocurrent was generated in the silicon, with there being a sharp cutoff in photoresponse above the MAPI bandgap. Construction of band diagrams indicated the presence of an upward valence band spike of up to 0.5 eV at the n-Si/MAPI interface that could impede carrier flow. Evidence for hole accumulation at this feature was seen in both Kelvin-probe transients and from unusual features in both current–voltage and capacitance–voltage measurements. The devices achieved a hysteresis-free best power conversion efficiency of 2.08%, V OC 0.46 V, J SC 11.77 mA/cm2, and FF 38.4%, demonstrating for the first time that it is possible to create a heterojunction PV device directly between the MAPI and n-Si. Further prospects for two-sided n-Si/MAPI heterojunctions are also discussed
    corecore