5,976 research outputs found

    Coexistence of bulk and surface states probed by Shubnikov-de Haas oscillations in Bi2_2Se3_3 with high charge-carrier density

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    Topological insulators are ideally represented as having an insulating bulk with topologically protected, spin-textured surface states. However, it is increasingly becoming clear that these surface transport channels can be accompanied by a finite conducting bulk, as well as additional topologically trivial surface states. To investigate these parallel conduction transport channels, we studied Shubnikov-de Haas oscillations in Bi2_2Se3_3 thin films, in high magnetic fields up to 30 T so as to access channels with a lower mobility. We identify a clear Zeeman-split bulk contribution to the oscillations from a comparison between the charge-carrier densities extracted from the magnetoresistance and the oscillations. Furthermore, our analyses indicate the presence of a two-dimensional state and signatures of additional states the origin of which cannot be conclusively determined. Our findings underpin the necessity of theoretical studies on the origin of and the interplay between these parallel conduction channels for a careful analysis of the material's performance.Comment: Manuscript including supplemental materia

    Deceleration and electrostatic trapping of OH radicals

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    A pulsed beam of ground state OH radicals is slowed down using a Stark decelerator and is subsequently loaded into an electrostatic trap. Characterization of the molecular beam production, deceleration and trap loading process is performed via laser induced fluorescence detection inside the quadrupole trap. Depending on details of the trap loading sequence, typically 10510^5 OH (X2Π3/2,J=3/2X^2\Pi_{3/2}, J=3/2) radicals are trapped at a density of around 10710^7 cm3^{-3} and at temperatures in the 50-500 mK range. The 1/e trap lifetime is around 1.0 second.Comment: 4 pages, 3 figure

    Technology exploration for adaptive power and frequency scaling in 90nm CMOS

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    In this paper we examine the expectations and limitations of design technologies such as adaptive voltage scaling (AVS) and adaptive body biasing (ABB) in a modern deep sub-micron process. To serve this purpose, a set of ring oscillators was fabricated in a 90nm triple-well CMOS technology. The analysis hereby presented is based on two ring oscillators running at 822MHz and 93MHz, respectively. Measurement results indicate that it is possible to reach 13.8x power savings by 3.4x frequency downscaling using AVS, ±11% power and ±8% frequency tuning at nominal conditions using ABB only, 22x power savings with 5x frequency downscaling by combining AVS and ABB, as well as 22x leakage reduction

    Glitch-free discretely programmable clock generation on chip

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    In this paper we describe a solution for a glitch-free discretely programmable clock generation unit (DPGC). The scheme is compatible with a GALS communication scheme in the sense that clock gating and clock pausing are possible. Besides, the proposed scheme does not require waiting for a new clock as the frequency change is seen as almost instantaneously. A prototype has been designed for a 0.13µm triple-well CMOS process technology to also study the properties of the scheme with respect to voltage scaling

    Symbolic Reachability Analysis of B through ProB and LTSmin

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    We present a symbolic reachability analysis approach for B that can provide a significant speedup over traditional explicit state model checking. The symbolic analysis is implemented by linking ProB to LTSmin, a high-performance language independent model checker. The link is achieved via LTSmin's PINS interface, allowing ProB to benefit from LTSmin's analysis algorithms, while only writing a few hundred lines of glue-code, along with a bridge between ProB and C using ZeroMQ. ProB supports model checking of several formal specification languages such as B, Event-B, Z and TLA. Our experiments are based on a wide variety of B-Method and Event-B models to demonstrate the efficiency of the new link. Among the tested categories are state space generation and deadlock detection; but action detection and invariant checking are also feasible in principle. In many cases we observe speedups of several orders of magnitude. We also compare the results with other approaches for improving model checking, such as partial order reduction or symmetry reduction. We thus provide a new scalable, symbolic analysis algorithm for the B-Method and Event-B, along with a platform to integrate other model checking improvements via LTSmin in the future
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