Electrothermal simulation and characterisation of series connected power devices and converter applications

Power electronics is undergoing significant changes both at the device and at the converter level. Wide bandgap power devices like SiC MOSFETs are increasingly implemented in automotive, grid and industrial drive applications with voltage ratings as high as 1.7kV now commercially available although much higher voltages have been demonstrated as research prototypes. In high power applications where high DC bus voltages are used, as is the case in voltage source converters for industrial drives, marine propulsion and grid connected energy conversion systems, it may be necessary to series connect power devices for OFF-state voltage sharing. In high power applications, before the advent of multi-level converters, series connection of IGBT power modules was commonplace especially for HVDC-voltage source converter applications. However, with the advent of the modular multi-level converter, where the AC voltage waveform is synthesized by discrete voltage steps, the need for series connected is obviated. Most HVDC-VSC applications are now implemented by modular-multi-level converters. However, in some applications like VSCs for distribution network power conversion, there can be a combination between series connection of power devices and multi-level converter. Traditionally, voltage balancing in series connected power devices was achieved using snubber capacitors for dynamic voltage sharing and resistors for static voltage sharing. However, the use of snubber capacitors reduces the switching speed of the converter thereby defeating the purpose of using SiC power devices especially in power converters with high switching frequencies. To avoid this, active gate driving techniques that avoid the use of snubber capacitors during switching are under intensive research focus. This involves intelligent gate drivers capable of dynamically adjusting the gate pulse during switching. To use these gate drivers, it is necessary to explore the boundaries of static and dynamic voltage imbalance in series connected power devices. For example, it is necessary to understand how differences in device junction temperature and gate driver switching rates affects voltage divergence between series connected devices and how this differs between silicon IGBTs and SiC MOSFETs. This is similarly the case between series connected silicon PiN diodes and SiC Schottky diodes. Since silicon IGBTs and PiN diodes respectively exhibit tails currents and reverse recovery during turn-OFF, the dynamics of voltage divergence between series devices will differ from unipolar SiC power devices. Furthermore, the leakage current mechanisms determine the OFF-state voltage balancing dynamics and since Si IGBTs have different leakage current mechanisms from SiC devices, OFF-state voltage balancing in series connected devices will be different between the technologies. The contribution of this thesis is using finite element and compact device models backed by experimental measurements to investigate static and dynamic voltage imbalance in series connected power devices. Starting from the fundamental physics behind device operation, this thesis explores how the leakage currents and tail currents affects voltage divergence in series silicon bipolar devices compared to SiC power devices. This analysis is compared with how the switching dynamics peculiar to fast switching SiC devices affects voltage balancing in series connected SiC devices. Simulations and measurements show that series connected SiC power devices are less prone of excessive voltage divergence due to the absence of tail currents compared to series connected silicon bipolar devices where voltage divergence due to tail currents is evident. Reduced leakage currents due to the wide bandgap in SiC also ensures that it is less prone to voltage divergence (compared to silicon bipolar devices) under static OFF-state conditions. This means the snubber resistances can be increased thereby reducing the OFF-state power dissipation in series connected SiC devices. In the analysis of voltage sharing of series connected devices during the static ON-state and OFF-state it was shown that the zero-temperature coefficient of the power devices determines the voltage sharing and loss distribution in the ON-state while the leakage current and switching synchronization is critical in the OFF-state. Simulations and measurements in this thesis show that the higher ZTC points in silicon bipolar devices compared to SiC unipolar devices means that ON-state voltage divergence depends on the load current. The dominant failure mode for series connected power devices is failure under dynamic avalanche which occurs in cases of extreme uncontrolled voltage divergence. In the investigations of the switching transient behaviour of series connected IGBT and SiC MOSFETs during turn-OFF, it was shown that the voltage imbalance for Si IGBT is highly dependent on the carrier concentration in the drift region during switching while for SiC MOSFET it depends on the switching time constant of the gate voltage and the rate that the MOS-channel cuts the current. The thesis also explores the limits of power device performance under dynamic avalanche conditions for both series silicon bipolar and SiC unipolar devices. In the analysis of SOA of series connected devices it was discussed that the SOA is reduced by increased switching rates and DC link voltages. Finally, the thesis explores the 3L-NPC converter and how the power factor of the load on the AC side of the converter alters the power dissipation sharing between the devices. The results show that loss distribution between the devices in the converter is not just affected by the load power factor but also by the switching frequency

The potential of SiC Cascode JFETs in electric vehicle traction inverters

The benefits of implementing SiC devices in EV powertrains has been widely reported in various studies. New generations of SiC devices including planar MOSFETs, trench MOSFETs and more recently, cascode JFETs have been released by various manufacturers. SiC cascode devices comprise of low voltage silicon MOSFETs for gate driving and high voltage depletion mode SiC JFETs for voltage blocking. These devices are particularly interesting because it avoids the known reliability issues of SiC gate oxide traps resulting in threshold voltage drift. In this paper, an EV powertrain is simulated using experimental measurements of conduction and switching energies of various SiC devices including 650V trench, 900V planar and 650V cascode JFETs. Unlike previous papers where losses are calculated using models based on datasheet parameters, here static and dynamic measurements on the power devices at different currents and temperatures are used to calculate losses over simulated driving cycles. Field-stop IGBTs are also evaluated. The 3-phase 2-level inverter model is electrothermal by accounting for the measured temperature dependence of the losses and uses accurate thermal networks derived from datasheets. Converter efficiency and thermal performance are compared for each device technology. Results show that SiC cascode JFETs have great potential in EV powertrain applications

Fast switching SiC cascode JFETs for EV traction inverters

This paper investigates the potential performance of high speed SiC cascode JFETs in EV traction inverters with high switching frequencies. Traction inverters implemented with SiC devices have shown improved energy conversion efficiency compared to IGBT based traction inverters however SiC MOSFETs suffer from unstable threshold voltage due to charge trapping at the SiC/SiO 2 (due to high density of traps). Since SiC cascode JFETs combine low voltage silicon MOSFETs (at the input) with high speed/high-power density SiC JFETs (at the output), cascode JFETs combine the electrical gate oxide reliability of silicon devices with the power density of SiC. This paper simulates an EV driving cycle using experimental power loss measurements (at different currents and temperatures) of commercially available 650V SiC cascode JFETs and SiC MOSFETs. The inverter has been simulated at 10, 25 and 50 kHz to investigate the impact of increased switching frequency on device losses. The model is fully electrothermal since conduction and switching losses have been measured at different junction temperatures and used as inputs to the model. The results show the potential of superior performance of the SiC cascode JFET in terms of power loss and junction temperature swings. Furthermore, since higher switching frequencies might be desirable in future high-speed traction motors, the fast switching and low loss performance of SiC Cascode JFETs becomes more attractive

Enabling high reliability power modules : a multidisciplinary task

Reliability of power electronic systems is a major concern for application engineers in the automotive and power system sectors. Power electronic modules are one of the main sources of failure in wind energy conversion systems. Power electronic converters used in wind turbine electric drive trains, railway traction, more-electric-aircrafts, marine propulsion and grid connected systems like FACTS/HVDC require reliable power devices and modules. Wide bandgap semiconductors like SiC have demonstrated enlarged electrothermal Safe-Operating-Areas compared with silicon devices. However, the reliability of SiC power modules and packages has been identified as an area of potential weakness. Traditional packaging systems have been developed for Si hence the different thermomechanical properties of SiC cause different stresses in the packaging thereby potentially causing reduced reliability. This paper identifies some of the key areas for the development of reliable power electronic systems using SiC. The focus is on condition monitoring, packaging system innovation and thermomechanical stress analysis as a function of the mechanical properties of Si and SiC. Power cycling experiments and finite element models have been used to support the analysis

Physics-based modelling and experimental characterisation of parasitic turn-on in IGBTs

As power electronic engineers increase the switching speed of voltage source converters for the purpose of higher power density, the dI/dt and dV/dt across the power semiconductors increases as well. A well-known adverse consequence of high dV/dt is parasitic turn-on of the power device in the same phase leg as the device being triggered. This causes a short circuit with high shoot-through current, high instantaneous power dissipation and possibly device degradation and destruction. It is critical for converter designers to be able to accurately predict this phenomenon through diagnostic and predictive modelling. In this paper, a physics-based device and circuit model is presented together with experimental results on parasitic turn-on of IGBTs in voltage source converters. Because the model is physics based, it produces more accurate results compared with compact circuit models like SPICE and other circuit models that use lumped parameters. The discharge of the Miller capacitance is simulated as a voltage dependent depletion capacitance and an oxide capacitance as opposed to a lumped capacitor. The model presented accurately simulates IGBT tail currents, PiN diode reverse recovery and the non-linear miller capacitance all of which cannot be solved by lumped parameter compact models. This is due to the fact that the IGBT current in the model is calculated using the Fourier series based re-construction of the ambipolar diffusion equation and the miller capacitances are calculated using fundamental device physics equations. This paper presents a physics-based device and circuit model for parasitic turn-on in silicon IGBTs by numerically modelling the minority carrier distribution profile in the drift region. The model is able to accurately replicate the transient waveforms by avoiding the use of lumped parameters normally used in compact models

Nonlinear energy harvesting from random narrow-band excitations

The efficiency of linear and nonlinear harvesters with different types of nonlinearity is compared. Narrow band ambient vibrations are modeled by harmonic Gaussian noise. We show that the performance of nonlinear harvesters strongly depends on both the form of nonlinearity and the properties of the noise. Particular forms of nonlinearities which can produce a better than linear response are identified, and these depend on the spectral width of the harmonic noise

Safe-operating-area of snubberless series connected silicon and SiC power devices

As power devices are series connected for voltage sharing, loss of gate drive synchronization and/or variation in device switching time constant can cause voltage imbalance. Capacitors (in snubbers) are usually added to maintain series voltage balance, however, in snubberless designs, where active gate drivers are used for voltage balancing during transients, it is necessary to evaluate the limits of the power device under transient unsynchronized switching. In series devices, desynchronization of the gate drivers in series connected devices will cause the faster switching device into avalanche during turn-OFF. Power device failure from BJT latch-up in MOSFETs and thyristor latch-up in IGBTs can result in potentially destructive consequences for the entire converter. Failure of the power device under avalanche is exacerbated by the (i) device commutation rate (ii) device junction temperature (iii) magnitude of gate drive switching mismatch and (iv) ratio of the DC bus voltage to intrinsic breakdown voltage of the device. This paper uses experimental measurements and finite element models to investigate the limits of power device failure under transient unsynchronized switching of series connected SiC trench MOSFET and silicon IGBT devices