What is the English Constitution? The Answer of John James Park in the Crucial Year 1832

From the 1688 revolution to the beginning of 19th century, the English constitution underwent a deep transformation. While the divine right of Kings and the royal prerogative waned, the role of Prime Minister and rule by Cabinet became paramount; a two-party system gradually imposed itself in the new-born “Great Britain”. But this essential change went nearly unobserved by political thinkers and jurists of the time, with the notable exception of J.J. Park, who published The Dogmas of the Constitution, a sharp denunciation of the gap between theoretical and actual constitution, in 1832, the year of the Great Reform Act

Enabling mixed-precision quantized neural networks in extreme-edge devices

The deployment of Quantized Neural Networks (QNN) on advanced microcontrollers requires optimized software to exploit digital signal processing (DSP) extensions of modern instruction set architectures (ISA). As such, recent research proposed optimized libraries for QNNs (from 8-bit to 2-bit) such as CMSIS-NN and PULP-NN. This work presents an extension to the PULP-NN library targeting the acceleration of mixed-precision Deep Neural Networks, an emerging paradigm able to significantly shrink the memory footprint of deep neural networks with negligible accuracy loss. The library, composed of 27 kernels, one for each permutation of input feature maps, weights, and output feature maps precision (considering 8-bit, 4-bit and 2-bit), enables efficient inference of QNN on parallel ultra-low-power (PULP) clusters of RISC-V based processors, featuring the RV32IMCXpulpV2 ISA. The proposed solution, benchmarked on an 8-cores GAP-8 PULP cluster, reaches peak performance of 16 MACs/cycle on 8 cores, performing 21 7 to 25 7 faster than an STM32H7 (powered by an ARM Cortex M7 processor) with 15 7 to 21 7 better energy efficiency

Enabling Mixed-Precision Quantized Neural Networks in Extreme-Edge Devices

The deployment of Quantized Neural Networks (QNN) on advanced microcontrollers requires optimized software to exploit digital signal processing (DSP) extensions of modern instruction set architectures (ISA). As such, recent research proposed optimized libraries for QNNs (from 8-bit to 2-bit) such as CMSIS-NN and PULP-NN. This work presents an extension to the PULP-NN library targeting the acceleration of mixed-precision Deep Neural Networks, an emerging paradigm able to significantly shrink the memory footprint of deep neural networks with negligible accuracy loss. The library, composed of 27 kernels, one for each permutation of input feature maps, weights, and output feature maps precision (considering 8-bit, 4-bit and 2-bit), enables efficient inference of QNN on parallel ultra-low-power (PULP) clusters of RISC-V based processors, featuring the RV32IMCXpulpV2 ISA. The proposed solution, benchmarked on an 8-cores GAP-8 PULP cluster, reaches peak performance of 16 MACs/cycle on 8 cores, performing 21x to 25x faster than an STM32H7 (powered by an ARM Cortex M7 processor) with 15x to 21x better energy efficiency.Comment: 4 pages, 6 figures, published in 17th ACM International Conference on Computing Frontiers (CF '20), May 11--13, 2020, Catania, Ital

DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs

The deployment of Deep Neural Networks (DNNs) on end-nodes at the extreme edge of the Internet-of-Things is a critical enabler to support pervasive Deep Learning-enhanced applications. Low-Cost MCU-based end-nodes have limited on-chip memory and often replace caches with scratchpads, to reduce area overheads and increase energy efficiency -- requiring explicit DMA-based memory transfers between different levels of the memory hierarchy. Mapping modern DNNs on these systems requires aggressive topology-dependent tiling and double-buffering. In this work, we propose DORY (Deployment Oriented to memoRY) - an automatic tool to deploy DNNs on low cost MCUs with typically less than 1MB of on-chip SRAM memory. DORY abstracts tiling as a Constraint Programming (CP) problem: it maximizes L1 memory utilization under the topological constraints imposed by each DNN layer. Then, it generates ANSI C code to orchestrate off- and on-chip transfers and computation phases. Furthermore, to maximize speed, DORY augments the CP formulation with heuristics promoting performance-effective tile sizes. As a case study for DORY, we target GreenWaves Technologies GAP8, one of the most advanced parallel ultra-low power MCU-class devices on the market. On this device, DORY achieves up to 2.5x better MAC/cycle than the GreenWaves proprietary software solution and 18.1x better than the state-of-the-art result on an STM32-F746 MCU on single layers. Using our tool, GAP-8 can perform end-to-end inference of a 1.0-MobileNet-128 network consuming just 63 pJ/MAC on average @ 4.3 fps - 15.4x better than an STM32-F746. We release all our developments - the DORY framework, the optimized backend kernels, and the related heuristics - as open-source software.Comment: 14 pages, 12 figures, 4 tables, 2 listings. Accepted for publication in IEEE Transactions on Computers (https://ieeexplore.ieee.org/document/9381618

GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors

open6siembargoed_20220427Bruschi, Nazareno; Haugou, Germain; Tagliavini, Giuseppe; Conti, Francesco; Benini, Luca; Rossi, DavideBruschi, Nazareno; Haugou, Germain; Tagliavini, Giuseppe; Conti, Francesco; Benini, Luca; Rossi, David

Periacetabular Tumour Resection under Anterosuperior Iliac Spine Allows Better Alloprosthetic Reconstruction than Above: Bone Contact Matters

Periacetabular resections are more affected by late complications than other pelvic resections. Reconstruction using bone allograft is considered a suitable solution. However, it is still not clear how the bone-allograft contact surface impacts on mechanical and functional outcome

Scale up your In-Memory Accelerator: leveraging wireless-on-chip communication for AIMC-based CNN inference

Analog In-Memory Computing (AIMC) is emerging as a disruptive paradigm for heterogeneous computing, potentially delivering orders of magnitude better peak performance and efficiency over traditional digital signal processing architectures on Matrix-Vector multiplication. However, to sustain this throughput in real-world applications, AIMC tiles must be supplied with data at very high bandwidth and low latency; this poses an unprecedented pressure on the on-chip communication infrastructure, which becomes the system's performance and efficiency bottleneck. In this context, the performance and plasticity of emerging on-chip wireless communication paradigms provide the required breakthrough to up-scale on-chip communication in large AIMC devices. This work presents a many-tile AIMC architecture with inter-tile wireless communication that integrates multiple heterogeneous computing clusters, embedding a mix of parallel RISC-V cores and AIMC tiles. We perform an extensive design space exploration of the proposed architecture and discuss the benefits of exploiting emerging on-chip communication technologies such as wireless transceivers in the millimeter-wave and terahertz bands.This work was supported by the WiPLASH project (g.a. 863337), founded from the European Union’s Horizon 2020 research and innovation program.Peer ReviewedPostprint (author's final draft

Evidence of SARS-CoV-2 in nasal brushings and olfactory mucosa biopsies of COVID-19 patients

The aim of the present study is to detect the presence of SARS-CoV-2 of patients affected by COVID-19 in olfactory mucosa (OM), sampled with nasal brushing (NB) and biopsy, and to assess whether a non-invasive procedure, such as NB, might be used as a large-scale procedure for demonstrating SARS-CoV-2 presence in olfactory neuroepithelium. Nasal brushings obtained from all the COVID-19 patients resulted positive to SARS-CoV-2 immunocytochemistry while controls were negative. Double immunofluorescence showed that SARS-CoV-2 positive cells included supporting cells as well as olfactory neurons and basal cells. OM biopsies showed an uneven distribution of SARS-CoV-2 positivity along the olfactory neuroepithelium, while OM from controls were negative. SARS-CoV-2 was distinctively found in sustentacular cells, olfactory neurons, and basal cells, supporting what was observed in NB. Ultrastructural analysis of OM biopsies showed SARS-CoV-2 viral particles in the cytoplasm of sustentacular cells. This study shows the presence of SARS-CoV-2 at the level of the olfactory neuroepithelium in patients affected by COVID-19. For the first time, we used NB as a rapid non-invasive tool for assessing a potential neuroinvasion by SARS-CoV-2 infection