40 research outputs found
dReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter
Current datacenters are based on server machines, whose mainboard and hardware components form the baseline, monolithic building block that the rest of the system software, middleware and application stack are built upon. This leads to the following limitations: (a) resource proportionality of a multi-tray system is bounded by the basic building block (mainboard), (b) resource allocation to processes or virtual machines (VMs) is bounded by the available resources within the boundary of the mainboard, leading to spare resource fragmentation and inefficiencies, and (c) upgrades must be applied to each and every server even when only a specific component needs to be upgraded. The dRedBox project (Disaggregated Recursive Datacentre-in-a-Box) addresses the above limitations, and proposes the next generation, low-power, across form-factor datacenters, departing from the paradigm of the mainboard-as-a-unit and enabling the creation of function-block-as-a-unit. Hardware-level disaggregation and software-defined wiring of resources is supported by a full-fledged Type-1 hypervisor that can execute commodity virtual machines, which communicate over a low-latency and high-throughput software-defined optical network. To evaluate its novel approach, dRedBox will demonstrate application execution in the domains of network functions virtualization, infrastructure analytics, and real-time video surveillance.This work has been supported in part by EU H2020 ICTproject dRedBox, contract #687632.Peer ReviewedPostprint (author's final draft
Disaggregated Compute, Memory and Network Systems: A New Era for Optical Data Centre Architectures
The disaggregated dRedBox Data Centre architecture is proposed that enables dynamic allocation of pooled compute and memory resources. An orchestration platform is described and algorithms are simulated that demonstrate the efficient utilization of IT infrastructure
EXA2PRO programming environment:Architecture and applications
The EXA2PRO programming environment will integrate a set of tools and methodologies that will allow to systematically address many exascale computing challenges, including performance, performance portability, programmability, abstraction and reusability, fault tolerance and technical debt. The EXA2PRO tool-chain will enable the efficient deployment of applications in exascale computing systems, by integrating high-level software abstractions that offer performance portability and efficient exploitation of exascale systems' heterogeneity, tools for efficient memory management, optimizations based on trade-offs between various metrics and fault-tolerance support. Hence, by addressing various aspects of productivity challenges, EXA2PRO is expected to have significant impact in the transition to exascale computing, as well as impact from the perspective of applications. The evaluation will be based on 4 applications from 4 different domains that will be deployed in JUELICH supercomputing center. The EXA2PRO will generate exploitable results in the form of a tool-chain that support diverse exascale heterogeneous supercomputing centers and concrete improvements in various exascale computing challenges
dRedDbox: Demonstrating disaggregated memory in an optical Data Centre
This paper showcases the first experimental demonstration of disaggregated memory using the dRedDbox optical Data Centre architecture. Experimental results demonstrate the 4-tier network scalability and performance of the system at the physical and application layer
Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services
Vitamin-V is a 2023-2025 Horizon Europe project that aims to develop a complete RISC-V open-source software stack for cloud services with comparable performance to the cloud-dominant x86 counterpart and a powerful virtual execution environment for software development, validation, verification, and test that considers the relevant RISC-V ISA extensions for cloud deployment
MCF-SMF Hybrid Low-Latency Circuit-Switched Optical Network for Disaggregated Data Centers
This paper proposes and experimentally evaluates a
fully developed novel architecture with purpose built low latency
communication protocols for next generation disaggregated data
centers (DDCs). In order to accommodate for capacity and
latency needs of disaggregated IT elements (i.e. CPU, memory),
this architecture makes use of a low latency and high capacity
circuit switched optical network for interconnecting various endpoints, that are equipped with multi-channel Silicon photonic
based integrated transceivers. In a move to further decrease the
perceived latency between various disaggregated IT elements,
this paper proposes a) a novel network topology, which cuts
down the latency over the optical network by 34% while
enhancing system scalability and b) channel bonding over multicore fiber (MCF) switched links to reduce head to tail latency
and in turn increase sustained memory bandwidth for
disaggregated remote memory. Furthermore, to reduce power
consumption and enhance space efficiency, the integration of
novel multi core fiber (MCF) based transceivers, fibers and
optical switches are proposed and experimentally validated at the
physical layer for this topology. It is shown that the integration of
MCF based subsystems in this topology can bring about an
improvement in energy efficiency of the optical switching layer
which is above 60%. Finally, the performance of this proposed
architecture and topology is evaluated experimentally at the
application layer where the perceived memory throughput for
accessing remote and local resources is measured and compared
using electrical circuit and packet switching. The results also
highlight a multi fold increase in application perceived memory
throughput over the proposed DDC topology by utilization and
bonding of multiple optical channels to interconnect
disaggregated IT elements that can be carried over MCF links
Comparison of Psychological Distress between Type 2 Diabetes Patients with and without Proteinuria
We investigated the link between proteinuria and psychological distress among patients with type 2 diabetes mellitus (T2DM). A total of 130 patients with T2DM aged 69.1±10.3 years were enrolled in this cross-sectional study. Urine and blood parameters, age, height, body weight, and medications were analyzed, and each patient’s psychological distress was measured using the six-item Kessler Psychological Distress Scale (K6). We compared the K6 scores between the patients with and without proteinuria. Forty-two patients (32.3%) had proteinuria (≥±) and the level of HbA1c was 7.5±1.3%. The K6 scores of the patients with proteinuria were significantly higher than those of the patients without proteinuria even after adjusting for age and sex. The clinical impact of proteinuria rather than age, sex and HbA1c was demonstrated by a multiple regression analysis. Proteinuria was closely associated with higher psychological distress. Preventing and improving proteinuria may reduce psychological distress in patients with T2DM
Demonstration of NFV for mobile edge computing on an optically disaggregated datacentre in a box
This demonstrator showcases the hardware and software integration achieved by the dReDBox project [1] towards realization of a novel architecture using dynamically-reconfigurable optical interconnects to create a flexible, scalable and efficient disaggregated datacentre infrastructure
Cache Performance of the Integer SPEC Benchmarks on a RISC
ABSTRACT SPEC is a new set of benchmark programs designed to measure a computer system's performance. The performance measured by benchmarks is strongly affected by the existence and configuration of cache memory. In this paper we evaluate the cache miss ratio of the Integer SPEC benchmarks. We show that the cache miss ratio depends strongly on the program, and that large caches are not completely exercised by these benchmarks