24 research outputs found

    Deposition of Black Material on Metal Traces Surrounding Display Screen Blind-Holes to Increase Camera Performance and Improve Aesthetic Appearance

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    This publication describes techniques and apparatuses for increasing camera performance and improving the aesthetic appearance of electronic device display screens with front facing cameras that utilize display screen blind-holes. The techniques include depositing a black material on metal signal traces (metal traces) located in an inactive area of the display screen. The black material is positioned to increase the viewable area of the front-facing camera, reduce the size of the inactive area (e.g., a display screen blind spot), hide reflective metal traces present on a layer of the display panel, and reduce the occurrence of the lightguide effect on image quality

    Clock Trace Structure for Block Sequential Clock Driving

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    This publication describes systems and techniques directed at block sequential clock driving to minimize dynamic power consumption associated with driving display panels. In an aspect, clock trace structures within display panels configured to minimize parasitic capacitance associated with display panel circuitry are described herein. In further aspects, techniques enabling resistor-capacitor load matching to minimize a perceived, on-screen luminance delta are also described herein. Through such systems and techniques, display panels can reduce power consumption without degrading user experience

    Dynamic Anode Initialization to Mitigate Luminance Drop

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    In AMOLED displays, the OLED anode is frequently reset to ensure that black regions in the display have low light emission. However, anode resetting has the unwanted side effect of slowing low luminance pixel response. This disclosure describes techniques to maintain the darkness of black regions of AMOLED displays while ensuring rapid pixel response. An anode initialization voltage bias is defined as the voltage at the source terminal of the transistor that effects the resetting of the OLED anode. The anode initialization voltage bias is adapted, or, alternatively, made to electrically float, based on the display brightness level such that dark pixels can rapidly respond to light emission demands. The OLED anode maintains a voltage just below its light emitting threshold voltage such that it can rapidly respond to sudden spikes in light emission demands while also maintaining the darkness of black pixels

    Readability Enhancements for Device Displays used in Bright-Lighting Conditions

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    This publication describes apparatuses for enhancing the readability of content on the display of a computing device when accessed by a user in bright ambient lighting conditions. In an aspect, the apparatus is a display panel configured to block ambient light from entering and/or being reflected out of vertical interconnect access (VIA) holes (e.g., reflective, electrical bridges that connect conductive layers within the device display) present in a layer of the display panel. To enhance display readability of content in bright ambient lighting conditions, VIA holes may be covered to enhance a display contrast ratio (e.g., the display luminance of a white image versus the display luminance of a black image). The display panel may include a metal or polymer layer positioned over VIA holes within the display layers (e.g., positioned on a layer of the display) and shaped to block reflected light but not block emissive light (e.g., from red/green/blue subpixels)

    Dynamically Altering Clock Signal Frequencies in LTPO AMOLED Displays

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    This publication describes systems and techniques for dynamically altering clock signal frequencies in low-temperature polysilicon metal oxide (LTPO) active-matrix organic light-emitting diode (AMOLED) displays. In an aspect, a display manager may identify a refresh rate implemented by an operating system of an electronic device, as well as a use case enacted by a user. As a result of the identification, the display manager can implement a suitable clock signal frequency for self-refresh operations. By dynamically altering clock signal frequencies, the display manager can reduce the number of transactions (e.g., passing high signals, passing low signals) in display panel circuitry associated with self-refresh operations. In so doing, the display manager can dynamically alter clock signal frequencies in LTPO AMOLED displays to reduce power consumption without degrading user experience

    Expediting Fingerprint Authentication by Compensating for Display Luminance Latency

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    This publication describes systems and techniques directed at expediting fingerprint authentication by compensating for display luminance latency. In aspects, a computing device having a display and an under-display fingerprint sensor (UDFPS), includes a local high brightness mode (LHBM) manager configured to selectively adjust luminance settings in a high-luminance region of the display for predetermined intervals. In so doing, user input can be well-illuminated during an initial stage of UDFPS image capturing, facilitating UDFPS sensing and expediting fingerprint authentication

    Dynamic Control of Scan Signals in AMOLED Displays to Reduce Power Consumption

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    This publication describes systems and techniques to dynamically control the scan signals of an active-matrix organic light-emitting diode (AMOLED) display in portable electronic devices. Displays in portable electronic devices, such as smartphones, include tens of thousands of pixels. Scan signals in the display control the brightness and color of individual pixels. A leading source of power consumption in AMOLED displays, however, is the parasitic capacitance in the scan lines that carry the scan signals. As the frame rate of AMOLED displays has increased, the frequency of scan signals and the associated parasitic capacitance has also increased. This publication discloses a portable electronic device that can dynamically control the number of pulses in scan signals to reduce power consumption without degrading image quality

    Image Data Compensation to Prevent Display Artifacts on an OLED Display

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    This publication describes techniques for image data compensation that prevent display artifacts on an organic light-emitting diode (OLED) display when the refresh rate and the clock speed of the display are changed. The OLED display may be implemented in a mobile device that supports multiple refresh rates. To conserve power, the mobile device may alter the refresh rate and clock speed of the OLED display from a first refresh rate and clock speed to a second refresh rate and clock speed. Image data intended to be displayed on a particular pixel row of the OLED display may be compensated based on the first refresh rate, the second refresh rate, and the location of the particular pixel row within the OLED display to generate compensated image data. Using the techniques described herein, the compensated image data may be output for use in preventing display artifacts while the image data is displayed in a first frame after the refresh rate and clock speed are changed

    Light-Guiding Structure For Under-Display Sensor Modules

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    This publication describes techniques and apparatuses for the use of a light-guiding structure to route electromagnetic signals emitted by an under-display sensor module to a bezel area of a mobile device for transmission and, likewise, route electromagnetic signals received in a bezel area to an under-display sensor module. In aspects, the light-guiding structure is a light guide plate, a curved light-guiding body, or optical fibers. The techniques and apparatuses provide increased efficiency of under-display sensor modules by avoiding signal loss caused by eliminating the need to transmit and receive electrical signals through the display panel structure of a display panel module

    High-performance organic field-effect transistors and circuits for 3D-shape substrates and applications

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    In recent years, the performance of organic field-effect transistors has significantly improved in terms of their field-effect mobility and threshold voltage as well as their operational/environmental stability. As the current driving capability becomes higher, parasitic contact resistance at the metal-semiconductor interface starts to limit the performance of OFETs. Therefore, low contact resistance in OFETs is one of the key elements realizing high performance OFETs with ideal field-effect transistor characteristics. In addition, fabrication methods that connect transistors on a flexible substrate at room temperature is essential technology in the realization of flexible electronic devices. The traditional micro-fabrication methods are not suitable for use in the fabrication of OFETs because of high process temperatures over 500 oC, and chemical/mechanical damages to organic materials during the process. These methods also compromise the advantages of OFETs, which is low-cost fabrication on a large-area substrate. In this dissertation, high-performance top-gate organic field-effect transistors comprising a TIPS-pentacene/PTAA film and a CYTOP/metal-oxide bilayer were developed on flexible, shape-memory polymer substrates. In detail, the performance of the top-gate OFETs was improved remarkably by lowering the contact resistance at the metal-semiconductor interface employing a contact-doping method. The fabricated top-gate OFETs presented lowest contact resistance value in TIPS-pentacene-based OFETs ever reported in literature. The OFETs having low contact resistance were used as a backplane of OFET circuits combined with a newly developed patterning method of a CYTOP/metal-oxide gate dielectric layer, reverse stamping. Finally, high performance top-gate OFET circuits on a shape-memory polymer substrate were first demonstrated based on this dissertation work.Ph.D
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