Capacitance Spectroscopy for MOS Systems

Producción CientíficaCapacitance studies of metal–oxide–semiconductor (MOS) capacitors have been used since the early 60s of the past century to investigates the interface surface states, oxide charge and electron and ion phenomena in these structures. This chapter provides detailed information about the theoretical basis, and examples of application of capacitance spectroscopy techniques in a variety of MOS systems

Programming Pulse Width Assessment for Reliable and Low-Energy Endurance Performance in Al:HfO2-Based RRAM Arrays

A crucial step in order to achieve fast and low-energy switching operations in resistive random access memory (RRAM) memories is the reduction of the programming pulse width. In this study, the incremental step pulse with verify algorithm (ISPVA) was implemented by using different pulse widths between 10 μ s and 50 ns and assessed on Al-doped HfO 2 4 kbit RRAM memory arrays. The switching stability was assessed by means of an endurance test of 1k cycles. Both conductive levels and voltages needed for switching showed a remarkable good behavior along 1k reset/set cycles regardless the programming pulse width implemented. Nevertheless, the distributions of voltages as well as the amount of energy required to carry out the switching operations were definitely affected by the value of the pulse width. In addition, the data retention was evaluated after the endurance analysis by annealing the RRAM devices at 150 °C along 100 h. Just an almost negligible increase on the rate of degradation of about 1 μ A at the end of the 100 h of annealing was reported between those samples programmed by employing a pulse width of 10 μ s and those employing 50 ns. Finally, an endurance performance of 200k cycles without any degradation was achieved on 128 RRAM devices by using programming pulses of 100 ns width

Control of the set and reset voltage polarity in anti-series and anti-parallel resistive switching structures

Producción CientíficaIn the attempt to control the polarity of the set and reset voltages in bipolar resistive switching capacitors, we have studied the switching properties of structures consisting of either two anti-series or two anti-parallel metal-insulator-metal capacitors. The capacitors were based on hafnium oxide, and W and TiN/Ti were used as bottom and top electrodes respectively. MIM capacitors showed bipolar resistive switching behavior, with very good repetitiveness and endurance properties. Both anti-series and anti-parallel structures showed again bipolar resistive switching behavior, being the polarity of the set and reset voltages controllable by applying higher biases. In the case of anti-series configuration, there is a stretch-out in the current-voltage characteristic because the bias is applied across two different devices. Changing the polarity is equivalent to the process of write and erase of complementary resistive switching devices in crossbar arrays. In the case of anti-parallel configuration, the resistance window between both resistivity states is reduced. The control of the switching polarity has also been observed when applying a small ac signal, and measuring the conductance of the structures.Ministerio de Economía, Industria y Competitividad - FEDER (project TEC2017-84321-C4-2-R

Controlling the intermediate conductance states in RRAM devices for synaptic applications

Producción CientíficaRRAM devices are promising candidates to implement artificial synaptic devices for their use in neuromorphic systems, due to their high number or reachable conductance levels. The capacitors used in this work (TiN/Ti/ HfO2/W) show resistive switching behavior and reachable intermediate conductance states. We can control the conductance states by applying voltage pulses to the top electrode. Different approaches to control the synaptic weight have been studied: applying pulses with different voltage amplitudes changes the synaptic weight variation in an exponential way, and applying pulses with different lengths changes the synaptic weight in a linear way. We can control the conductance values when applying depression pulses, but the potentiation characteristic is not linear, as for other synaptic devices, as PRAMs. Applying other voltage signals to the structure, as voltage ramps, can improve the potentiation characteristic.Ministerio de Economía, Ciencia y Competitividad - Fondo Europeo de Desarrollo Regional (project TEC2017-84321-C4-2-R

2020 IEEE Latin America Electron Devices Conference (LAEDC)

Producción CientíficaArtificial synaptic devices used in neuromorphic systems need a high number of reachable conductance levels. Resistive switching devices are promising candidates to implement these devices due to their reachable conductance levels. In this work, we have used TiN/Ti/HfO 2 /W capacitors to study the control of the intermediate conductance states using current pulses instead of the usual voltage pulses. Unlike the use of voltage pulses, in this case we can control the HRS to LRS transition (potentiation characteristic). The characteristic is clearly linear when applying current pulses with linearly increasing amplitudes. The potentiation characteristic is not affected by the pulse length, even for lengths lower than 1 μs. In terms of peripheral circuitry, it is desirable to use pulses with identical amplitudes, but in this case no accumulative behavior is observed, and one current pulse is enough to carry the device to the final conductance state achieved for the amplitude used. Finally, it is not possible to control the HRS to LRS transition (depression characteristic) using current pulses due to the abrupt reset transition. However, this transition can be well controlled using voltage pulses.Ministerio de Economía, Industria y Competitividad - Fondo Europeo de Desarrollo Regional (grant TEC2017-84321- C4-2-R

Scavenging effect on plasma oxidized Gd2_2O3_3 grown by high pressure sputtering on Si and InP substrates

In this work, we analyze the scavenging effect of titanium gates on metal insulator semiconductor capacitors composed of gadolinium oxide as dielectric material deposited on Si and InP substrates. The Gd$_2$O$_3$ film was grown by high pressure sputtering from a metallic target followed by an in situ plasma oxidation. The thickness of the Ti film was varied between 2.5 and 17 nm and was capped with a Pt layer. For the devices grown on Si, a layer of 5 nm of Ti decreases the capacitance equivalent thickness from 2.3 to 1.9 nm without compromising the leakage current (1e-4 A cm$^{-2}$ at Vgate equal to 1 V). Thinner Ti has little impact on device performance, while 17 nm of Ti produces excessive scavenging. For InP capacitors, the scavenging effect is also observed with a decrease in the capacitance equivalent thickness from 2.5 to 1.9 nm (or an increase in the accumulation capacitance after the annealing from 1.4 to 1.7-1.8 uF cm$^{-2}$). The leakage current density remains under 1e-2 A cm$^{-2}$ at Vgate equal to 1.5 V. For these devices, a severe flatband voltage shift with frequency is observed. This can be explained by a very high interface trap state density (in the order of 1e13-1e14 eV$^{-1}$ cm$^{-2}$).Comment: 29 pages, 12 figure

Memory maps : Reading RRAM devices without power consumption

Producción CientíficaA comparative study of MIM-RRAM structures with different insulator materials is presented. Admittance memory mapping was carried out at 0 V dc bias, revealing two clearly separated states, both in terms of conductance and susceptance. The memory in the ON state can be modeled by means of a two parameter (resistance and inductance) equivalent circuit. The parameter extraction provides memory maps for the resistance and the inductance as well. The transition shapes between the ON and OFF state are different for each structure due to specific physical mechanisms.Ministerio de Economía, Industria y Competitividad - Fondo Europeo de Desarrollo Regional (grant TEC2014-52152-C3-3-R)Fondo Europeo de Desarrollo Regional (project TK134)Estonian Research Agency (grants IUT2-24 and PRG4

RRAM Memories with ALD High-K Dielectrics: Electrical Characterization and Analytical Modeling

Resistive switching phenomena with adequate repetitiveness on Ta2O5-TiO2-Ta2O5 and TiO2-Ta2O5-TiO2 stacks are reported. In particular, 5–nm-thick TiO2 films embedding a monolayer of Ta2O5 show the best behavior in terms of bipolar cycles loop width, with separate low and high resistive states up to two orders of magnitude. Tantalum oxide layer increases the defect density in titania that becomes less leaky, and thus, resistive switching effects appear. Small signal ac parameters measured at low and medium frequencies, namely capacitance and conductance, also show hysteretic behavior during a whole bipolar switching cycle. This means that the memory state can be read at 0 V, without any power consumption. High-frequency measurements provide information about dipole relaxation frequency values in the dielectric bulk, and this can be connected with resistive switching behavior. Finally, a double tunneling barrier model fits I-V curves at the low-resistance state even at the bias range where reset occurs and a sharp fall takes place