Prototype Active Silicon Sensor in 150 nm HR-CMOS Technology for ATLAS Inner Detector Upgrade

The LHC Phase-II upgrade will lead to a significant increase in luminosity, which in turn will bring new challenges for the operation of inner tracking detectors. A possible solution is to use active silicon sensors, taking advantage of commercial CMOS technologies. Currently ATLAS R&D programme is qualifying a few commercial technologies in terms of suitability for this task. In this paper a prototype designed in one of them (LFoundry 150 nm process) will be discussed. The chip architecture will be described, including different pixel types incorporated into the design, followed by simulation and measurement results.Comment: 9 pages, 9 figures, TWEPP 2015 Conference, submitted to JINS

CMOS pixel sensors on high resistive substrate for high-rate, high-radiation environments

In Press, Corrected Proof — Note to usersInternational audienceA depleted CMOS active pixel sensor (DMAPS) has been developed on a substrate with high resistivity in a high voltage process. High radiation tolerance and high time resolution can be expected because of the charge collection by drift. A prototype of DMAPS was fabricated in a 150 nm process by LFoundry. Two variants of the pixel layout were tested, and the measured depletion depths of the variants are 166 μm and 80 μm. We report the results obtained with the prototype fabricated in this technology

Diffraction studies under in situ electric field using a large-area hybrid pixel XPAD detector

International audienc

Depleted fully monolithic active CMOS pixel sensors (DMAPS) in high resistivity 150 nm technology for LHC

International audienceDepleted monolithic CMOS 1 1 Complementary metal-oxide-semiconductor.  active pixel sensors (DMAPS) have been developed to demonstrate their suitability as pixel detectors in the outer layers of the ATLAS Inner Tracker (ITk) pixel detector in the High-Luminosity Large Hadron Collider (HL-LHC). Two prototypes have been fabricated using a 150 nm CMOS technology on high resistivity ( ≥  2 k Ω cm) wafers. The chip size of 10 mm  ×  10 mm is similar to that of the current FE-I3 ATLAS pixel detector readout chip. One of the prototypes is used for detailed characterization of the sensor and analog front end circuitry of the DMAPS. The other one is a fully monolithic DMAPS, including fast readout digital logics that handle the required hit rate. To yield a strong homogeneous electric field within the sensor volume, back-side process of the wafer was tested. The prototypes were irradiated with X-rays up to a total ionization dose (TID) of 50 Mrad(SiO 2 ) and with neutrons up to a 1 MeV neutron equivalent fluence of 10 15  n eq /cm 2 to test non-ionizing energy loss (NIEL) effects. The analog front end circuitry maintained its performance after TID irradiation, and the hit efficiency at < 10 −7 noise occupancy was as high as 98.9% after NIEL irradiation

Test results of irradiated CMOS pixel circuits in 150 nm CMOS technology for the ATLAS Inner Tracker Upgrade

International audienceA major upgrade for the ATLAS Inner Tracker at the Large Hadron Collider (LHC) is scheduled in 2026. Depleted CMOS pixel sensors on high resistivity substrates in LFoundry 150 nm technology are an interesting option for this upgrade. Recently two large demonstrators, one based on a hybrid concept called LF-CPIX and the other based on a fully monolithic concept called LF-Monopix have been produced. Both prototypes were characterized in the lab and after irradiation up to 160 MRad under CERN’s 24 GeV Proton Synchrotron beam. In this work, we will describe the behavior under radiation of the two prototypes

Development of depleted monolithic pixel sensors in 150 nm CMOS technology for the ATLAS Inner Tracker upgrade

International audienceThis work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150 nm CMOS process. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade for the High Luminosity Large Hadron Collider (HL-LHC). Implementing such a device in the detector module will result in a lower production cost and lower material budget compared to the presently used hybrid designs. In this paper the chip architecture will be described followed by the simulation and measurement results

Hardware Architecture and Cutting-Edge Assembly Process of a Tiny Curved Compound Eye

International audienceThe demand for bendable sensors increases constantly in the challenging field of soft and micro-scale robotics. We present here, in more detail, the flexible, functional, insect-inspired curved artificial compound eye (CurvACE) that was previously introduced in the Proceedings of the National Academy of Sciences (PNAS, 2013). This cylindrically-bent sensor with a large panoramic field-of-view of 180 degrees x 60 degrees composed of 630 artificial ommatidia weighs only 1.75 g, is extremely compact and power-lean (0.9 W), while it achieves unique visual motion sensing performance (1950 frames per second) in a five-decade range of illuminance. In particular, this paper details the innovative Very Large Scale Integration (VLSI) sensing layout, the accurate assembly fabrication process, the innovative, new fast read-out interface, as well as the auto-adaptive dynamic response of the CurvACE sensor. Starting from photodetectors and microoptics on wafer substrates and flexible printed circuit board, the complete assembly of CurvACE was performed in a planar configuration, ensuring high alignment accuracy and compatibility with state-of-the art assembling processes. The characteristics of the photodetector of one artificial ommatidium have been assessed in terms of their dynamic response to light steps. We also characterized the local auto-adaptability of CurvACE photodetectors in response to large illuminance changes: this feature will certainly be of great interest for future applications in real indoor and outdoor environments

Design, assembly and validation of the Filter Exchange System of LSSTCam

International audienceThe Filter Exchange System (FES) of the Legacy Survey of Space and Time camera (LSSTCam) for the Vera C. Rubin Observatory has been integrated into the camera assembly before shipping to Chile. It holds five 75-cm filters weighing 25.5 to 38 kg. The main requirement for the FES is to perform each exchange in under 90s, with 100-μm positioning in the focal plane, while operating within the envelope of the camera body. The FES is split into three motorized subsystems: the Carousel stores the filters and rotates the selected filter to the standby position, the Autochanger moves the filter between the standby position and the focal plane, and the Loader can be mounted on the camera body to swap filters in and out during daytime, allowing the use of the full 6-filter set of LSSTCam. The locking mechanisms are also motorized, and their designs and qualifications account for seisms up to magnitude 7. Additional design constraints come from the temperature range at the Observatory and the cleanliness requirements for the filters and lenses. Programmable Logic Controllers enforce the safety equations of the system, and the control of the FES has been integrated into the overall Camera Control System software. After assembly of a full-scale prototype, the FES has been assembled and tested in France on a test-stand simulating telescope attitude, then integrated into the camera body at SLAC National Accelerator Laboratory. It meets its required performances, including an average exchange time of 83s

Radiation hard DMAPS pixel sensors in 150 nm CMOS technology for operation at LHC

International audienceMonolithic Active Pixel Sensors (MAPS) have been developed since the late 1990s employing silicon substrate with a thin epitaxial layer in which deposited charge is collected by disordered diffusion rather than by drift in an electric field. As a consequence the signal is small and slow, and the radiation tolerance is below the requirements for LHC experiments by factors of 100 to 1000. We developed fully depleted (D)MAPS pixel sensors employing a 150 nm CMOS technology and using a high resistivity substrate as well as a high biasing voltage. The development has been carried out in three subsequent iterations, from prototypes to a large pixel matrix comprising a complete readout architecture suitable for LHC operation. Full CMOS electronics is embedded in large deep n-wells which at the same time serve as collection nodes (large electrode design). The devices have been intensively characterized before and after irradiation employing lab tests as well as particle beams. The devices can cope with particle rates seen by the innermost pixel detectors of the LHC pp-experiments or as seen by the outer pixel layers of the planned HL-LHC upgrade. They are radiation hard to particle fluences of at least 1015 neq/cm2 and total ionization doses of at least 50 Mrad