High Efficiency Si Solar Cells Characterization Using

Abstract. Impedance Spectroscopy has been used to analyse commercial Si photovoltaic solar cells, to obtain information about minority carrier lifetimes, series and parallel resistances, and acceptor impurity densities. Silicon solar cells efficiencies ranging between 17 and 18% from different manufacturers have been analysed obtaining differences mainly in the electron lifetimes and doping densities. Relations between these parameters and DC curves are discussedMinisterio de Economía y Competitividad under project TEC2013-4835-

Fabrication and Characterization of Multiband Solar Cells Based on Highly Mismatched Alloys

Multiband solar cells are one type of third generation photovoltaic devices in which an increase of the power conversion efficiency is achieved through the absorption of low energy photons while preserving a large band gap that determines the open circuit voltage. The ability to absorb photons from different parts of the solar spectrum originates from the presence of an intermediate energy band located within the band gap of the material. This intermediate band, acting as a stepping stone allows the absorption of low energy photons to transfer electrons from the valence band to the conduction band by a sequential two photons absorption process. It has been demonstrated that highly mismatched alloys offer a potential to be used as a model material system for practical realization of multiband solar cells. Dilute nitride GaAs1-xNx highly mismatched alloy with low mole fraction of N is a prototypical multiband semiconductor with a well-defined intermediate band. Currently, we are using chemical beam epitaxy to synthesize dilute nitride highly mismatched alloys. The materials are characterized by a variety of structural and optical methods to optimize their properties for multiband photovoltaic devices

High temperature behavior of GaN HEMT devices on Si(111) and sapphire substrates.

A study of the high temperature DC performance of nitride high electron mobility transistors (HEMTs) on Si(111) and sapphire substrates with different gate lengths is reported. All single gate transistors decrease their drain current (ID) and transconductance (gm) from room temperature (RT) up to 350 ºC, mainly due to the electron mobility reduction by optical phonon scattering. At RT, HEMTs on Si(111) present higher ID and gm than transistors on sapphire, probably related to their lower self-heating. As devices are heated, these differences tend to disappear, indicating that the substrate thermal conductivity becomes less important. Compact devices have low relative reduction in ID and gm values with temperature, since shorter gate lengths lead to higher fields under the gate and lower temperature dependence of the drift velocit

Aluminium incorporation in AlGaN/GaN heterostructures: a comparative study by ion beam analysis and X-ray diffraction

The Al content in AlxGa1 − xN/GaN heterostructures has been determined by X-ray diffraction (XRD) and contrasted with absolute measurements from ion beam analysis (IBA) methods. For this purpose, samples with 0.1bxb0.3 grown by metal organic chemical vapour deposition on sapphire substrates have been studied. XRD and IBA corroborate the good epitaxial growth of the AlGaN layer, which slightly deteriorates with the incorporation of Al for xN0.2. The assessment of Al incorporation by XRD is quite reliable regarding the average value along the sample thickness. However, XRD analysis tends to overestimate the Al fraction at low contents, which is attributed to the presence of strain within the layer. For the highest Al incorporation, IBA detects a certain Al in-depth compositional profile that should be considered for better XRD data analysis

Effects of N2 Plasma Pretreatment on the SiN Passivation of AlGaN/GaN HEMT

The impact of in situ low-power plasma pretreatment, prior to silicon-nitride (SiN) deposition, was investigated in AlGaN/GaN high-electron mobility transistors (HEMTs). These studies reveal that the use of plasma in HEMT passivation reduces current-collapse and gate-lag effects. Such treatment is also beneficial to improve gate leakage, and from RF measurements, no degradation of was observed. These beneficial effects of the plasma pretreatment seem to be due to a significant reduction in interface charge density, as shown in this letter using GaN MIS devices, where a decrease of 60% was observed

GaAs nanowires grown by Ga-assisted chemical beam epitaxy: Substrate preparation and growth kinetics

Growth kinetics of GaAs nanowires (NWs) on Si(111) substrates by Ga-assisted chemical beam epitaxy is studied as a function of growth conditions such as substrate temperature (Ts), V/III flux ratio and catalyst dimension. The preparation method for Si(111) substrates is optimized in order to obtain a thin surface oxide with a thickness around 0.5 nm, allowing both the decomposition of metalorganic precursors and GaAs nucleation at oxide pinholes. The use of thinner oxides enables the growth of a GaAs layer whereas the utilization of thicker oxides could even inhibit GaAs nucleation. The successful self-formation of Ga droplets over this slightly oxidized Si surface has been observed by scanning electron microscopy (SEM), whose initial size is demonstrated to affect both the NW growth rate and the resultant NW aspect ratio. The formation of these droplets is crucial to enable the catalytic growth of NWs whose morphology is thoroughly analyzed by SEM, showing a self-organized array of vertically aligned match shaped GaAs NWs with a hexagonal footprint. In addition, the crystalline structure of NWs is monitored in-situ by reflection high energy diffraction, showing pure zincblende phase along the whole NW stem. In terms of better NW aspect ratio, higher crystalline quality and faster growth rates, the best NW growth conditions are found at Ts=580 °C, using an effective flux ratio V/III≈0.8. Moreover, NW growth kinetics is demonstrated to be improved when using a pre-deposited Ga coverage of 7.5 monolayers, stabilized for 90 s prior to the NW growth

Integration of GaAs Nanowires on Electronic Devices by Dielectrophoresis

No abstract available

Integration of GaAs Nanowires on Electronic Devices by Dielectrophoresis

No abstract available

Pure Zincblende Ga(As,P) Nanowires Grown by Ga-assisted Chemical Beam Epitaxy

GaAs nanowires (NWs) were grown by Ga-assisted chemical beam epitaxy on Si(111) substrates covered by a thin oxide layer using different substrate temperatures and growth times. Ga droplet terminated NWs with hexagonal footprint and cross section were observed by scanning electron microscopy, with diameters and lengths in the range of 40–65 nm and 0.3–1.2 µm, respectively. Transmission electron microscopy (TEM) images show evidences of vapor–liquid–solid growth mechanisms which lead to different droplet-nanowire interface quality depending on Ga-catalyst wetting area of NW sidewalls. TEM and Raman spectroscopy demonstrates the existence of a single zincblende phase in the NW body, without any evidence of wurtzite phase domains