21 research outputs found
Perceived Workplace Discrimination and Disclosure at Work Among Lesbian and Gay Employees: The Role of Prior Coming Out Experiences in Different Life Domains
International audienc
Conditions d'efficience du sentiment d'efficacité personnelle dans la régulation d'une perturbation professionnelle : la dynamique du système des activités
Problématique des risques psychosociaux et médecine du travail : processus de construction de nouveaux objets et rôles professionnels
Démarche et enjeux d'une recherche–action en partenariat sur la thématique du stress et de la souffrance au travail
Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures
Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to 86%) and latency overhead (up to 79%).Accepted author manuscriptComputer EngineeringQuTechFTQC/Bertels Lab(OLD)Quantum Computer Architecture
Impact of therapeutic education on the evolution of social representations of medication in patients with Parkinson's disease: A quantitative and qualitative study (ETPARK REMED)
International audienc
Cryo-CMOS interfaces for large-scale quantum computers
Cryogenic CMOS (cryo-CMOS) is a viable technology for the control interface of the large-scale quantum computers able to address non-trivial problems. In this paper, we demonstrate state-of-the-art cryo-CMOS circuits and systems for such application and we discuss the challenges still to be faced on the path towards practical quantum computers.Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.QuTechQuantum Circuit Architectures and TechnologyQCD/Sebastiano LabQCD/Vandersypen LabQCD/Almudever LabQCD/Scappucci LabQCD/Veldhorst LabQN/Vandersypen Lab(OLD)Applied Quantum ArchitecturesElectronic
Multiplexed quantum transport using commercial off-the-shelf CMOS at sub-kelvin temperatures
Continuing advancements in quantum information processing have caused a paradigm shift from research mainly focused on testing the reality of quantum mechanics to engineering qubit devices with numbers required for practical quantum computation. One of the major challenges in scaling toward large-scale solid-state systems is the limited input/output (I/O) connectors present in cryostats operating at sub-kelvin temperatures required to execute quantum logic with high fidelity. This interconnect bottleneck is equally present in the device fabrication-measurement cycle, which requires high-throughput and cryogenic characterization to develop quantum processors. Here we multiplex quantum transport of two-dimensional electron gases at sub-kelvin temperatures. We use commercial off-the-shelf CMOS multiplexers to achieve an order of magnitude increase in the number of wires. Exploiting this technology, we accelerate the development of 300 mm epitaxial wafers manufactured in an industrial CMOS fab and report a remarkable electron mobility of (3.9 ± 0.6) × 105 cm2/Vs and percolation density of (6.9 ± 0.4) × 1010 cm−2, representing a key step toward large silicon qubit arrays. We envision that the demonstration will inspire the development of cryogenic electronics for quantum information, and because of the simplicity of assembly and versatility, we foresee widespread use of similar cryo-CMOS circuits for high-throughput quantum measurements and control of quantum engineered systems.QCD/Scappucci LabQuTechGeneralEMSD EEMCS Project engineersBusiness DevelopmentComputer Engineering(OLD)Applied Quantum ArchitecturesQCD/Veldhorst La