Electrical and thermal spin accumulation in germanium

In this letter, we first show electrical spin injection in the germanium conduction band at room temperature and modulate the spin signal by applying a gate voltage to the channel. The corresponding signal modulation agrees well with the predictions of spin diffusion models. Then by setting a temperature gradient between germanium and the ferromagnet, we create a thermal spin accumulation in germanium without any tunnel charge current. We show that temperature gradients yield larger spin accumulations than pure electrical spin injection but, due to competing microscopic effects, the thermal spin accumulation in germanium remains surprisingly almost unchanged under the application of a gate voltage to the channel.Comment: 7 pages, 3 figure

Electrical spin injection and detection in Germanium using three terminal geometry

In this letter, we report on successful electrical spin injection and detection in \textit{n}-type germanium-on-insulator (GOI) using a Co/Py/Al$_{2}$O$_{3}$ spin injector and 3-terminal non-local measurements. We observe an enhanced spin accumulation signal of the order of 1 meV consistent with the sequential tunneling process via interface states in the vicinity of the Al$_{2}$O$_{3}$/Ge interface. This spin signal is further observable up to 220 K. Moreover, the presence of a strong \textit{inverted} Hanle effect points at the influence of random fields arising from interface roughness on the injected spins.Comment: 4 pages, 3 figure

Crossover from spin accumulation into interface states to spin injection in the germanium conduction band

Electrical spin injection into semiconductors paves the way for exploring new phenomena in the area of spin physics and new generations of spintronic devices. However the exact role of interface states in spin injection mechanism from a magnetic tunnel junction into a semiconductor is still under debate. In this letter, we demonstrate a clear transition from spin accumulation into interface states to spin injection in the conduction band of $n$-Ge. We observe spin signal amplification at low temperature due to spin accumulation into interface states followed by a clear transition towards spin injection in the conduction band from 200 K up to room temperature. In this regime, the spin signal is reduced down to a value compatible with spin diffusion model. More interestingly, we demonstrate in this regime a significant modulation of the spin signal by spin pumping generated by ferromagnetic resonance and also by applying a back-gate voltage which are clear manifestations of spin current and accumulation in the germanium conduction band.Comment: 5 pages, 4 figure

Photonics and electronics integration in the HELIOS project

The objective of the European project HELIOS is to combine a photonic layer with a CMOS circuit by different innovative means, using microelectronics processes. Bonding of AWG + Ge Photodiodes on CMOS wafer is achieved

Efficient coupler between silicon photonic and metal-insulator-silicon-metal plasmonic waveguides

We report the experimental realization of a compact, efficient coupler between silicon waveguides and vertical metal-insulator-silicon-metal (MISM) plasmonic waveguides. Devices were fabricated using complementary metal-oxide-silicon technology processes, with copper layers that support low-loss plasmonic modes in the MISM structures at a wavelength of 1550 nm. By implementing a short (0.5 μm) optimized metal-insulator-silicon-insulator structure inserted between the photonic and plasmonic waveguide sections, we demonstrate experimental coupling loss of 2.5 dB, despite the high optical confinement of the MISM mode and mismatch with the silicon waveguide mode

Wafer-Scale, Sub-5 nm Junction Formation by Monolayer Doping and Conventional Spike Annealing

We report the formation of sub-5 nm ultrashallow junctions in 4 inch Si wafers enabled by the molecular monolayer doping of phosphorous and boron atoms and the use of conventional spike annealing. The junctions are characterized by secondary ion mass spectrometry and non-contact sheet resistance measurements. It is found that the majority (~70%) of the incorporated dopants are electrically active, therefore, enabling a low sheet resistance for a given dopant areal dose. The wafer-scale uniformity is investigated and found to be limited by the temperature homogeneity of the spike anneal tool used in the experiments. Notably, minimal junction leakage currents (<1 uA/cm2) are observed which highlights the quality of the junctions formed by this process. The results clearly demonstrate the versatility and potency of the monolayer doping approach for enabling controlled, molecular-scale ultrashallow junction formation without introducing defects in the semiconductor.Comment: 21 pages, 5 figure

Parasitic conduction in a 0.13 μ\mum CMOS technology at low temperature

Low temperature measurements at 4.2 K and 77 K are performed on n- and p-MOSFETs of a 0.13 $\mu$m CMOS technology. Two parasitic current contributions are identified in the subthreshold regime and strong inversion at 4.2 K. The first one is related to a parasitic parallel conduction inherent to Shallow Trench Isolation. Whereas the second one, resulting in a second peak in the linear transconductance, is discussed in terms of a stronger impact of substrate majority carriers due to a higher substrate resistivity at 4.2 K. The measured substrate current in n-MOSFETs is probably originating from electrons tunneling from the substrate valence band to the gate. At 4.2 K, the substrate current induces a reduction of the threshold voltage resulting in the measured “kink" of the $\rm I_D(V_G)$ characteristic and the second transconductance peak at low drain bias.

Schottky-Barrier height lowering by an increase of the substrate doping in PtSi Schottky barrier source/drain FETs

In this letter, the Schottky-barrier height (SBH) lowering in Pt silicide/n-Si junctions and its implications to Schottky-barrier source/drain p-field-effect transistors (p-SBFETs) are studied experimentally and numerically. We demonstrate that the increase of the n-Si substrate doping is responsible for a larger hole SBH lowering through an image-force mechanism, which leads to a substantial gain of the drive current in the long-channel bulk p-SBFETs. Numerical simulations. show that the channel doping concentration is also critical for short-channel p/n-silicon-on-insulator SBFET performance