Some Transistor Small Signal Equivalent Circuit Calculations

Transient responses, input and output impedances have been derived for the use of the circuit designer. A hybrid equivalent circuit was assumed to be correct and has been used as the basis of the derived relationships. Grounded emitter, grounded base, grounded collector and emitter degenerated configurations are discussed

Some Transistor Small Signal Equivalent Circuit Calculations

Transient responses, input and output impedances have been derived for the use of the circuit designer. A hybrid equivalent circuit was assumed to be correct and has been used as the basis of the derived relationships. Grounded emitter, grounded base, grounded collector and emitter degenerated configurations are discussed

Measurement of some transistor parameters

Design of transistor circuits, particularly those operating in the nanosecond time range necessitated the measurement of some transistor parameters usually not specified by the manufacturers. Collector to base capacitance, gain-bandwidth product, beta and base spreading resistance of the transistors of Table 1 were measured

A Distributed Amplifier Using Transistors

A distributed amplifier with a stable gain of 10, risetime of 2.5 nanoseconds for 125 ohm load impedance is described. The maximum output voltage is 3.2 volts with negative polarity. The amplifier consists of 2 stages of 6 Philco 2N1742 transistors each and an emitter follower using a 2N1500. Design formulae are derived and detailed performance of a specific amplifier is given

A 50 nanosecond linear gate circuit using transistors

In the past, linear gate circuits for gating pulses of photomultiplier tubes have been mostly based on semiconductor diodes. Using diffused base transistors as a gate in an emitter input configuration provides favorable linearity and feedthrough properties. The circuit described here is an improved version of one developed by A. V. Tollestrup

A multifold coincidence-veto circuit using transistors

A versatile coincidence-anticoincidence circuit in the 50 nsec time range is described capable of being used with large number of counters. Basic considerations with detailed circuits, operation and performance are given

A multifold coincidence-veto circuit using transistors

A versatile coincidence-anticoincidence circuit in the 50 nsec time range is described capable of being used with large number of counters. Basic considerations with detailed circuits, operation and performance are given