Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform

We present FASoC, the world’s first autonomous mixed-signal SoC framework driven entirely by user constraints, along with a suite of automated generators for analog blocks. The process agnostic framework takes high-level user intent as inputs to generate optimized and fully verified analog blocks using a cell-based design methodology. Our approach is highly scalable and silicon-proven by an SoC prototype which includes 2 PLLs, 3 LDOs, 1 SRAM, and 2 temperature sensors fully integrated with a processor in a 65nm CMOS process. The physical design of all blocks, including analog, is achieved using optimized synthesis and APR flows in commercially available tools. The framework is portable across different processes and requires no human in the loop, dramatically accelerating design time.This material is based on research sponsored by Air Force Research Laboratory (AFRL) and Defense Advanced Research Projects Agency (DARPA) under agreement number FA8650 18 2 7844. The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation thereon.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/165331/1/Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform.pdfDescription of Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform.pdf : Main articleSEL