14 research outputs found
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Method for Measuring Architectural Test Coverage for Design Verification
A technique that applies the task coverage exercised within a behavioral model of the design to the design itself, while simulating one or more test sequences. Since the behavior model is an accurate and complete program representation of the architectural specification of the hardware design, the test case coverage of the architecture is implied by the measurement of how well the behavioral model code has been exercised. The completeness of the coverage is determined by the test coverage criteria selected, including, for example, statement coverage, branch coverage, or path coverage. The more detailed the criteria, the greater the number of tests
Salivary Markers for Oral Cancer Detection
Oral cancer refers to all malignancies that arise in the oral cavity, lips and pharynx, with 90% of all oral cancers being oral squamous cell carcinoma. Despite the recent treatment advances, oral cancer is reported as having one of the highest mortality ratios amongst other malignancies and this can much be attributed to the late diagnosis of the disease. Saliva has long been tested as a valuable tool for drug monitoring and the diagnosis systemic diseases among which oral cancer. The new emerging technologies in molecular biology have enabled the discovery of new molecular markers (DNA, RNA and protein markers) for oral cancer diagnosis and surveillance which are discussed in the current review
Model Based Test Generation for Processor Verification
A few simple Expert-System techniques have been invaluable in developing a new test program generator for design verification of hardware processors. The new generator uses a formal declarative model of the processor architecture; it allows generation of test programs for a variety of processors without duplication of effort
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Test Program Generator
An architecture-independent test program generator for producing test programs for checking the operation of a hardware processor design comprises means for storing data representing the processor instruction set and resources, and logic for generating, for subsequent storage or processing, test programs from said stored data, characterized in that the data is a separate declarative specification, the generator comprising logic for extracting said data from the storage means, and in that the relationships between the processor resources and semantic entities associated with each instruction are modelled in said declarative specification
Test program generation for functional verification of PowerPC processors in IBM
A new methodology and test program generator have been used for the functional verification of six IBM PowerPC processors. The generator contains a formal model of the PowerPC architecture and a heuristic data-base of testing expertise. It has been used on daily basis for two years by about a hundred designers and testing engineers in four IBM sites. The new methodology reduced significantly the functional verification period and time to market of the PowerPC processors. Despite the complexity of the PowerPC architecture, the three processors verified so far had fully functional first silicon. 1 Introduction A new methodology and tool for functional test program generation has been used for several IBM PowerPC processors. The functional verification period and the processors time to market were reduced. Only one fifth of the simulation cycles needed to verify a RISC System/6000 processor with a previous generator was needed with the new methodology for a PowerPC processor. The new g..