Power electronics solution to dust emissions from thermal power plants

Thermal power stations emit significant amounts of fly ash and ultra fine particles into the atmosphere. Electrostatic precipitators (ESP) or electro filters remove flying ashes and fine particles from the flue gas before passing the gas into the chimney. Maximum allowable value of dust is 50 mg/m3 and it requires that the efficiency of the ESPs better than 99 %, which calls for an increase of active surface of the electrodes, hence increasing the filter volume and the weight of steel used for the filter. In previous decades, electrostatic precipitators in thermal power plants were fed by thyristor controlled, single phase fed devices having a high degree of reliability, but with a relatively low collection efficiency, hence requiring large effective surface of the collection plates and a large weight of steel construction in order to achieve the prescribed emission limits. Collection efficiency and energy efficiency of the electrostatic precipitator can be increased by applying high frequency high voltage power supply (HF HV). Electrical engineering faculty of the University of Belgrade (ETF) has developed technology and HF HV equipment for the ESP power supply. This solution was subjected to extensive experimental investigation at TE Morava from 2008 to 2010. High frequency power supply is proven to reduce emission two times in controlled conditions while increasing energy efficiency of the precipitator, compared to the conventional thyristor controlled 50Hz supply. Two high frequency high voltage unit AR70/1000 with parameters 70 kV and 1000 mA are installed at TE Morava and thoroughly testes. It was found that the HF HV power supply of the ESP at TE Morava increases collection efficiency so that emission of fine particles and flying ashes are halved, brought down to only 50 % of the emissions encountered with conventional 50 Hz thyristor driven power supplies. On the basis of this study, conclusion is drawn that the equipment comprising HF HV supplies are the best solution for new ESP installations, as well as for the reconstruction of existing facilities. The paper describes the topology of the HF HV power supply, power management and controls, and brings the most important details of the implementation. It is found that the HF HV solution achieves several significant improvements over the conventional thyristor system. It is possible to provide more precise control of the ESP parameters such as the output voltages and currents. It is also possible to make a rapid increase or decrease in voltage and to effectuate a very fast response to load changes. Due to this advantages it is possible to suppress the supply quickly in the case of sparking, reducing the spark energy and the quantity of ionized gasses produced by the electric arc. Reduction in the spark energy is up to 10 times compared to conventional thyristors solution. This means that the erosion of the electrode system is significantly reduced, and that the quality of the collection plates is preserved for much longer periods. At the same time, lower quantity of ionized gasses produced by the spark contribute to much shorter deionization intervals, required to quit sparking and evacuate charged particles in order to reinstate the voltage and proceed with the operation. In addition, HF HV power supply provides a significant reduction in size and weight of the complete ESP installation, hence reducing the tons of steel that has to be built in. Therefore, the HF HV power supply may be the key instrument to reducing the cost of the dedusting ecological equipment. Besides, size and weight reduction leads to cost savings of installation and maintenance. According to estimates, savings in steel may reach 30%, contributing to the overall cost savings of roughly 20%. Within this paper, in addition to describing the AR70/1000 unit topology and principles of operation, the paper presents the results and measurements obtained during extensive experimental investigations wherein performances of 50 Hz based thyristor units with T/R sets are compared to HF HV power supply

Study of Soft Switching Boost Converter using an Auxiliary Resonant Circuit

This thesis presents Soft Switching DC-DC boost Converter using an Auxiliary Resonant Circuit. The circuit consists of a general Boost Converter with an additional Auxiliary circuit which has a switch, inductor, capacitor and diode. By using an Auxiliary resonant circuit switching losses of a Boost Converter is reduced. Generally Boost Converter circuits have snubber circuit where switching losses are dissipated in external passive resistors; this is known as hard switching. In the proposed topology the generation of switching losses are avoided by forcing voltage (ZVS) or current (ZCS) to zero during switching. The efficiency is improved due to reduction in switching losses. MATLAB simulations are performed to verify the theoretical analysis

Experimental validation of ZVS boost converter with resonant circuit for low power photovoltaic applications

This thesis presents mathematical analysis of the photovoltaic (PV) model along with the comprehensive analysis of a resonant circuit based soft switching boost converter for PV applications. The converter maintains a Zero Voltage Switching (ZVS) turn-on and turn-off of the main switch, and Zero Current Switching (ZCS) turn-on and ZVS turn-off of the auxiliary switch due to the resonant circuit incorporated in the same. Detailed operation of the converter, analysis of various modes, simulation as well as experimental results for the design has also been aptly presented. Switching and conduction losses across the switches and the diodes have been calculated and analysed, and some light has also been thrown on the design of inductor used in the practical implementation. The Perturbation and Observation (P&O) method has been used in order to track the Maximum Power Point (MPP) from the PV panel. This soft switching technique has been aimed to be used in telecom services where there is a necessity of 48 V regulated DC bus voltage. The systems are modelled and simulated in PSIM 64 bit version 9.0 environment and is experimentally validated in FPGA environment. Thus, the feasibility and the effectiveness of the system were also proven through theoretical analysis and experimental results

Zero-Voltage- and Zero-Current-Switching Full-Bridge Converter With Secondary Resonance

A zero-voltage- and zero-current-switching full-bridge (FB) converter with secondary resonance is presented and analyzed. The primary side of the converter is composed of FB insulated-gate bipolar transistors, which are driven by phase-shift control. The secondary side is composed of a resonant tank and a half-wave rectifier. Without an auxiliary circuit, zero-voltage switching (for leading-leg switches) and zero-current switching (for lagging-leg switches) are achieved in the entire operating range. To implement the converter without an additional inductor, the leakage inductance of the transformer is utilized as the resonant inductor. Due to its many advantages, including high efficiency, minimum number of devices, and low cost, this converter is attractive for high-voltage and high-power applications. The analysis and design considerations of the converter are presented. A prototype was implemented for an application requiring a 5-kW output power, an input-voltage range varying from 250 to 350 V, and a 350-V output voltage. The experimental results obtained from a prototype verify the analysis. The prototype's efficiency at full load is over 95.5%.X117084sciescopu

Development of Efficient Soft Switching Synchronous Buck Converter Topologies for Low Voltage High Current Applications

Switched mode power supplies (SMPS) have emerged as the popular candidate in all the power processing applications. The demand is soaring to design high power density converters. For reducing the size, weight, it is imperative to channelize the power at high switching frequency. High switching frequency converters insist upon soft switching techniques to curtail the switching losses. Several soft switching topologies have been evolved in the recent years. Nowadays, the soft switching converters are vastly applied modules and the demand is increasing for high power density and high efficiency modules by minimizing the conduction and switching losses. These modules are generally observed in many applications such as laptops, desktop processors for the enhancement of the battery life time. Apart from these applications, solar and spacecraft applications demand is increasing progressively for stressless and more efficient modules for maximizing the storage capacity which inturn enhances the power density that improves the battery life to supply in the uneven times. Modern trends in the consumer electronic market focus increases in the demand of lower voltage supplies. Conduction losses are significantly reduced by synchronous rectifiers i.e., MOSFET’s are essentially used in many of the low voltage power supplies. Active and passive auxiliary circuits are used in tandem with synchronous rectifier to diminish the crucial loss i.e., switching loss and also it minimizes the voltage and current stresses of the semiconductor devices. The rapid progress in the technology and emerging portable applications poses serious challenges to power supply design engineers for an efficient power converter design at high power density. The primary aim is to design and develop high efficiency, high power density topologies like: buck, synchronous buck and multiphase buck converters with the integration of soft switching techniques to minimize conduction and switching losses sustaining the voltage and current stresses within the tolerable range. In this work, two ZVT-ZCT PWM synchronous buck converters are introduced, one with active auxiliary circuit and the other one with passive auxiliary circuit. The operating principle and comprehensive steady state analysis of the ZVT-ZCT PWM synchronous buck converters are presented. The converters are designed to have high efficiency and low voltage that is suitable for high power density application. The semiconductor devices used in the topologies in addition to the main switch operate with soft switching conditions. The viii Abstract topologies proposed render a large overall efficiency in contrast to the contemporary topologies. In addition the circuit’s size is less, reliable and have high performance-cost ratio. The new generation microprocessor demands the features such as low voltage, high current, high power density and high efficiency etc., in the design of power supplies. The supply voltage for the future generation microprocessors must be low, in order to decrease the power consumption. The voltage levels are dripping to a level even less than 0.7V, and the power consumption increases as there is an increase in the current requirement for the processor. In order to meet the demands of the new generation microprocessor power supply, a soft switching multiphase PWM synchronous buck converter is proposed. The losses in the proposed topology due to increasing components are pared down by the proposed soft switching technique. The proposed converters in this research work are precisely described by the mathematical modelling and their operational modes. The practicality of the proposed converters for different applications is authenticated by their simulation and experimental results

Three-Phase Reduced Switch Topologies for AC-DC Front-End and Single-Stage Converters

Conventional three-phase ac-dc converters have two converter stages. They have a front-end converter that converts the input ac voltage into an intermediate dc bus voltage and a second, back-end converter that converts this dc bus voltage into the desired isolated dc output voltage. The front-end converter also performs power factor correction (PFC) and shapes the three-phase input currents so that they are nearly sinusoidal and in phase with the three-phase input voltages. This allows the ac power source to be used in the most efficient manner. The front-end ac-dc converter is typically implemented with six switches while the back-end dc-dc converter is typically implemented with a four switch dc-dc full-bridge topology. Power electronic researchers have been motivated to try to reduce the number of switches that are used in the conventional two-stage approach in order to reduce cost and simplify the overall ac-dc converter. There are two general approaches to doing this: This first approach is to reduce the number of switches in the front-end ac-dc converter. The second approach is to combine the ac-dc converter and the dc-dc converter in a single converter so that the overall ac-dc converter can be implemented in a single converter stage that can simultaneously perform ac-dc power conversion with PFC and dc-dc power conversion. The main focus of this thesis is on new power converter topologies that convert a three-phase ac input voltage into an isolated dc output voltage with a reduced number of switches. In the thesis, a new family of reduced switch front-end converter topologies is proposed, an example converter from this new family is selected for further study and a modified version of this topology is studied as well. In addition to these front-end converters, two new three-phase ac-dc single-stage converters are proposed and their properties and characteristics are compared. For each new converter that is investigated in detail, its modes of operation are explained, its steady-state characteristics are determined by mathematical analysis, and the results of the analysis are used to develop a design procedure that can be used to select key components. The design procedure of each new converter is demonstrated with an example that was used in the implementation of an experimental prototype that confirmed the feasibility of the converter. The thesis concludes by presenting that have been reached as a result of the work that was performed, stating its main contributions to the power electronics literature and suggesting future research that can be done based on the thesis work

Performance Improvement of AC-DC Power Factor Correction Converters For Distributed Power System

In present situation, the increase in the utilization of computers, laptops,uninterruptable power supplies, telecom and bio-medical equipments has become uncontrollable as its growth is rising exponentially. Hence, increase in functionality of such equipments leads to the higher power consumption and low power density which provided a large market to distributed power systems (DPS). The development of these DPS posed challenges to power engineers for an efficient power delivery with stringent regulating standards; this is the motivation and driving force of this research work. The objective is to minimize the switching losses of front-end converters employed in DPS, with the primary aim of achieving nearly unity power factor operation of converters.Single-phase and three-phase rectifiers are increasingly used in the field of alternating current – direct current (AC-DC) power converters as front-end converters in DPS. For power factor correction (PFC) stage, conventional single-phase AC-DC PFC boost converter is the most suitable topology because of its inherent advantages. These PFC boost converters exhibit poor dynamic regulation of output voltage owing to low pass filter in the voltage feedback loop. Research effort has been made to mitigate this problem of AC-DC PFC boost converters. An extended pulse width modulation switching technique has been investigated and proposed especially for single-phase and three-phase AC-DC PFC boost converters to improve the dynamic response of output voltage during transient periods