Adaptive code division multiple access protocol for wireless network-on-chip architectures

Massive levels of integration following Moore\u27s Law ushered in a paradigm shift in the way on-chip interconnections were designed. With higher and higher number of cores on the same die traditional bus based interconnections are no longer a scalable communication infrastructure. On-chip networks were proposed enabled a scalable plug-and-play mechanism for interconnecting hundreds of cores on the same chip. Wired interconnects between the cores in a traditional Network-on-Chip (NoC) system, becomes a bottleneck with increase in the number of cores thereby increasing the latency and energy to transmit signals over them. Hence, there has been many alternative emerging interconnect technologies proposed, namely, 3D, photonic and multi-band RF interconnects. Although they provide better connectivity, higher speed and higher bandwidth compared to wired interconnects; they also face challenges with heat dissipation and manufacturing difficulties. On-chip wireless interconnects is one other alternative proposed which doesn\u27t need physical interconnection layout as data travels over the wireless medium. They are integrated into a hybrid NOC architecture consisting of both wired and wireless links, which provides higher bandwidth, lower latency, lesser area overhead and reduced energy dissipation in communication. However, as the bandwidth of the wireless channels is limited, an efficient media access control (MAC) scheme is required to enhance the utilization of the available bandwidth. This thesis proposes using a multiple access mechanism such as Code Division Multiple Access (CDMA) to enable multiple transmitter-receiver pairs to send data over the wireless channel simultaneously. It will be shown that such a hybrid wireless NoC with an efficient CDMA based MAC protocol can significantly increase the performance of the system while lowering the energy dissipation in data transfer. In this work it is shown that the wireless NoC with the proposed CDMA based MAC protocol outperformed the wired counterparts and several other wireless architectures proposed in literature in terms of bandwidth and packet energy dissipation. Significant gains were observed in packet energy dissipation and bandwidth even with scaling the system to higher number of cores. Non-uniform traffic simulations showed that the proposed CDMA-WiNoC was consistent in bandwidth across all traffic patterns. It is also shown that the CDMA based MAC scheme does not introduce additional reliability concerns in data transfer over the on-chip wireless interconnects

Wireless network on-chips history-based traffic prediction for token flow control and allocation

Wireless network-on-chip (WiNoC) uses a wireless backbone on top of the traditional wired-based NoC which demonstrated high scalability. WiNoC introduces long-range single-hop link connecting distanced core and high bandwidth radio frequency interconnects that reduces multi-hop communication in conventional wired-based NoC. However, to ensure full benefits of WiNoC technology, there is a need for fair and efficient Medium Access Control (MAC) mechanism to enhance communication in the wireless Network-on-Chip. To adapt to the varying traffic demands from the applications running on a multicore environment, MAC mechanisms should dynamically adjust the transmission slots of the wireless interfaces (WIs), to ensure efficient utilization of the wireless medium in a WiNoC. This work presents a prediction model that improves MAC mechanism to predict the traffic demand of the WIs and respond accordingly by adjusting transmission slots of the WIs. This research aims to reduce token waiting time and inefficient decision making for radio hub-to-hub communication and congestion-aware routing in WiNoC to enhance end to end latency. Through system level simulation, we will show that the dynamic MAC using an History-based prediction mechanism can significantly improve the performance of a WiNoC in terms of latency and network throughput compared to the state-of-the-art dynamic MAC mechanisms

On the cooperative relaying strategies for multi-core wireless Network-on-Chip

Recently, hybrid wired-wireless Network-on-Chip (WiNoC) has been proposed as a suitable communication fabric to provide scalability and satisfy high performance demands of the exascale era of modern multi/many-core System-on-Chip (SoC) design. A well accepted low-latency wireless communication fabric for WiNoCs is millimeter wave (mm-Wave). However, the wireless channel of mm-Wave is lossy due to free space signal radiation with both dielectric propagation loss (DPL) and molecular absorption attenuation (MAA). This is exacerbated for edge situated cores and in macro-chips embodying thousands of cores. To this end, this paper proposes efficient relaying techniques to improve the signal strength of the wireless channel in the WiNoCs using on-chip networking approaches under the realistic SoC channel conditions. First, we propose a realistic relay communication channel for the WiNoCs to characterise both MAA and DPL which have drastic effect on the performance. We then derive and show that the channel capacity for a single-relay WiNoC employing Amplify-and-Forward (AF) and Decode-and-Forward (DF) relaying protocols increases by up to 20% and 25%, respectively, compared to the conventional direct transmission. The AF protocol outperforms the DF mode for shorter transmissions between the relay and the destination cores, while the reverse is observed in other conditions. A hybrid protocol is then proposed to exploit the performance advantages of both relaying protocols to address the unbalanced distance between the cores, providing the maximal channel capacity close to the cutset bound. Finally, our approach is further validated in multi-relay WiNoCs where the communications of the remote cores is assisted by multiple intermediate cores along with the details of associated realistic channel model in emerging many-core SoCs

Performance Evaluation of Centralized Reconfigurable Transmitting Power Scheme in Wireless Network-on-chip

Network-on-chip (NoC) is an on-chip communication network that allows parallel communication among all cores to improve inter-core performance. Wireless NoC (WiNoC) introduces long-range and high bandwidth radio frequency (RF) interconnects that can possibly reduce the multi-hop communication of the planar metal interconnects in conventional NoC platforms. In WiNoC, RF transceivers account for a significant power consumption, particularly its transmitter, out of its total communication energy. This paper evaluates the energy and latency performance of a closed loop power management mechanism which enables transmitting power reconfiguration in WiNoC based on number of erroneous received packets. The scheme achieves significant energy savings with limited performance degradation and insignificant impact on throughput

An analytical channel model for emerging wireless networks-on-chip

Recently wireless Networks-on-Chip (WiNoCs) have been proposed to overcome the scalability and performance limitations of traditional multi-hop wired NoC architectures. However, the adaptation of wireless technology for on-chip communication is still in its infancy. Consequently, several challenges such as simulation and design tools that consider the technological constraints imposed by the wireless channel are yet to be addressed. To this end, in this paper, we propose and efficient channel model for WiNoCs which takes into account practical issues and constraints of the propagation medium, such as transmission frequency, operating temperature, ambient pressure and distance between the on-chip antennas. The proposed channel model demonstrates that total path loss of the wireless channel in WiNoCs suffers from not only dielectric propagation loss (DPL) but also molecular absorption attenuation (MAA) which reduces the reliability of the system

Towards a scalable and reliable wireless network-on-chip

Multi-core platforms are emerging trends in the design of Systems-on-Chip (SoCs). Interconnect fabrics for these multi-core SoCs play a crucial role in achieving the target performance. The Network-on-Chip (NoC) paradigm has been proposed as a promising solution for designing the interconnect fabric of multi-core SoCs. But the performance requirements of NoC infrastructures in future technology nodes cannot be met by relying only on material innovation with traditional scaling. The continuing demand for low power and high speed interconnects with technology scaling necessitates looking beyond the conventional planar metal/dielectric-based interconnect infrastructures. Among different possible alternatives, the on-chip wireless communication network is envisioned as a revolutionary methodology, capable of bringing significant performance gains for multi-core SoCs. Wireless NoCs (WiNoCs) can be designed by using miniaturized on-chip antennas as an enabling technology. In this work, design methodologies and technology requirements for scalable WiNoC architectures are presented and their performance is evaluated. It is demonstrated that WiNoCs outperform their wired counterparts in terms of network throughput and latency, and that energy dissipation improves by orders of magnitude under various experimental and real-life scenarios. A major challenge that NoC design is expected to face is related to the intrinsic unreliability of the interconnect infrastructure under technology limitations. The devices and components of the WiNoCs are expected to suffer high failure rates. By incorporating error control coding (ECC) schemes along the interconnects, NoC architectures will be able to provide correct functionality even in the presence of different sources of transient noise and yet have low energy dissipation. In this work, designs of novel joint crosstalk avoidance and multiple error correction/detection codes as well as burst error correction codes are proposed and their performance is evaluated in different WiNoC fabrics. It is demonstrated that by using the proposed codes WiNoCs can achieve the same reliability as a wireline NoC with much less energy dissipation and higher performance

Robust and Traffic Aware Medium Access Control Mechanisms for Energy-Efficient mm-Wave Wireless Network-on-Chip Architectures

To cater to the performance/watt needs, processors with multiple processing cores on the same chip have become the de-facto design choice. In such multicore systems, Network-on-Chip (NoC) serves as a communication infrastructure for data transfer among the cores on the chip. However, conventional metallic interconnect based NoCs are constrained by their long multi-hop latencies and high power consumption, limiting the performance gain in these systems. Among, different alternatives, due to the CMOS compatibility and energy-efficiency, low-latency wireless interconnect operating in the millimeter wave (mm-wave) band is nearer term solution to this multi-hop communication problem. This has led to the recent exploration of millimeter-wave (mm-wave) wireless technologies in wireless NoC architectures (WiNoC). To realize the mm-wave wireless interconnect in a WiNoC, a wireless interface (WI) equipped with on-chip antenna and transceiver circuit operating at 60GHz frequency range is integrated to the ports of some NoC switches. The WIs are also equipped with a medium access control (MAC) mechanism that ensures a collision free and energy-efficient communication among the WIs located at different parts on the chip. However, due to shrinking feature size and complex integration in CMOS technology, high-density chips like multicore systems are prone to manufacturing defects and dynamic faults during chip operation. Such failures can result in permanently broken wireless links or cause the MAC to malfunction in a WiNoC. Consequently, the energy-efficient communication through the wireless medium will be compromised. Furthermore, the energy efficiency in the wireless channel access is also dependent on the traffic pattern of the applications running on the multicore systems. Due to the bursty and self-similar nature of the NoC traffic patterns, the traffic demand of the WIs can vary both spatially and temporally. Ineffective management of such traffic variation of the WIs, limits the performance and energy benefits of the novel mm-wave interconnect technology. Hence, to utilize the full potential of the novel mm-wave interconnect technology in WiNoCs, design of a simple, fair, robust, and efficient MAC is of paramount importance. The main goal of this dissertation is to propose the design principles for robust and traffic-aware MAC mechanisms to provide high bandwidth, low latency, and energy-efficient data communication in mm-wave WiNoCs. The proposed solution has two parts. In the first part, we propose the cross-layer design methodology of robust WiNoC architecture that can minimize the effect of permanent failure of the wireless links and recover from transient failures caused by single event upsets (SEU). Then, in the second part, we present a traffic-aware MAC mechanism that can adjust the transmission slots of the WIs based on the traffic demand of the WIs. The proposed MAC is also robust against the failure of the wireless access mechanism. Finally, as future research directions, this idea of traffic awareness is extended throughout the whole NoC by enabling adaptiveness in both wired and wireless interconnection fabric

An efficient channel model for evaluating wireless NoC architectures

Wireless Networks-on-Chip (WiNoCs) have emerged to solve the scalability and performance bottleneck of conventional wired NoC architectures. However unlike communication in the macro-world, on-chip communication poses several constraints, hence there is the need for simulation and design tools that consider the effect of the wireless channel at the nanotechnology level. In this paper, we present a parameterizable channel model for WiNoCs which takes into account practical issues and constraints of the propagation medium, such as transmission frequency, operating temperature, ambient pressure and distance between the on-chip antennas. The proposed channel model demonstrates that total path loss of the wireless channel in WiNoCs suffers from not only dielectric propagation loss (DPL) but also molecular absorption attenuation (MAA) which reduces the reliability of the syste