Développement d'une architecture innovante de récepteur radar à 77 GHz et démonstration en CMOS 28 nm FDSOI

Grâce à sa capacité à détecter des cibles éloignées malgré une mauvaise visibilité, le radar automobile à 77 GHz joue un rôle important dans l'aide à la conduite. L'utilisation des fréquences millimétriques offre une bonne résolution et une importante capacité d'intégration des circuits. C'est aussi un défi car il faut satisfaire un cahier des charges exigeant sur le bruit et la linéarité du récepteur. Les technologies SiGe BiCMOS ont été les premières utilisées pour la conception de récepteurs radar à 77 GHz. De bons résultats ont été obtenus en se basant sur des architectures utilisant des mélangeurs actifs. Cependant l'utilisation des technologie BiCMOS se traduisait par une consommation élevée, une faible capacité d'intégration et des coûts de production importants. Récemment, l'intégration des procédés CMOS menant à l'augmentation des fréquences de transition rend ces technologies plus attractives pour les applications nécessitant un faible coût et la cointégration de plusieurs fonctions au sein d'une même puce. La littérature sur les récepteurs radars en technologie CMOS à 77 GHz montre que les architectures inspirées par les technologies BiCMOS ne sont pas pertinentes pour cette application. Le but de cette thèse et de montrer que l'utilisation de techniques propres aux technologie CMOS comme l'échantillonnage et l'utilisation de portes logiques permet d'obtenir de très bonnes performances. Dans ce travail, deux nouvelles architectures de récepteurs radars basées sur le principe d'échantillonnage sont proposées. La première architecture est basée sur un mélangeur passif échantillonné qui permet d'obtenir un très bon compromis bruit/linéarité. La seconde exploite les propriétés des mélangeurs sous-échantillonnés afin utiliser une fréquence d'OL trois fois inférieure à la fréquence RF offrant ainsi de très intéressantes simplifications au niveau de la chaîne de distribution du signal d'OL du récepteur. Le contexte de cette étude est expliqué dans le 1er chapitre qui présente les exigences de conception liées à l'application radar et fourni une analyse de l'état de l'art des récepteurs à 77 GHZ. Le chapitre suivant décrit le principe de fonctionnement et l'implémentation d'un mélangeur échantillonné à 77 GHz en technologie CMOS 28- nm FDSOI. Une topologie de mélangeur sous-échantillonné utilisant une fréquence d'OL de 26 GHz pour convertir des signaux RF autour de 77 GHz est ensuite détaillée dans le chapitre 3. Le chapitre 4 conclut cette étude en détaillant l'intégration des mélangeurs étudiés dans les chapitres précédents avec un amplificateur faible bruit dans différents récepteurs radars. Ces architectures de récepteurs basées sur l'échantillonnage sont ensuite comparées entre elles et avec l'état de l'art montrant ainsi leurs avantages et inconvénients. Les résultats de cette comparaison confirment l'intérêt des techniques d'échantillonnage pour la conversion de fréquence dans le cadre de l'application radar.With its ability to detect distant targets under harsh visibility conditions, the 77 GHz automotive radar plays a key role in driving safety. Using mm-wave frequencies allow a good range resolution, a better circuit integration and a wide modulation bandwidth. This is also a challenge for circuit designers who must fulfill stringent requirements especially on the receiver front-end. First 77 GHz radar receivers were manufactured with SiGe BiCMOS processes benefiting from the high transition frequency and high breakdown voltage of Hetero-junction Bipolar Transistors (HBT). Good results have been achieved with active-mixer-based architectures, but these technologies suffer from high power consumptions, limited integration capacity and large production cost. More recently, the scaling down of CMOS processes (coming together with the increase of the transition frequency of the transistors) makes CMOS a good candidate for 77 GHz circuit design, especially when cost target requires single chip solutions. The literature related to CMOS radar receivers highlights that receivers based on BiCMOS architectures generally show poor performances. The aim of this work is to demonstrate that using CMOS specific technics such as sampling and the use of high-speed digital gates should enhance the performance of the receivers. In this work, two innovative radar receiver architectures based on the sampling principle are proposed. The first one shows that this principle can be extended to millimeter wave frequencies to benefit from a very good noise/linearity trade-off. While the second one uses this principle to converts a 77 GHz RF signal by using a 26 GHz LO frequency thus simplifying the LO distribution chain of the receiver. The background of this study is introduced in the chapter 1 presenting the design trade-off related to the 77 GHz radar receiver and provides a review of the existing solutions. The following chapter describes the sampling mixer principle and the implementation of a 77 GHz sampling mixer in 28-nm FDSOI CMOS technology. Then, a sub- sampling mixer topology allowing to convert an RF signal around 77 GHz using a 26 GHz LO frequency is detailed in the chapter 3. The chapter 4 draws the conclusion of this study by showing the implementation of the two proposed sampling-based mixers with a low noise amplifier in 77 GHz front ends. These receiver architectures are compared with the state of the art highlighting the strengths and weaknesses of the proposed solutions. The results of this study demonstrates that using sampling for down conversion can be convenient to address millimeter-wave frequency applications

A Millimeter-Wave Coexistent RFIC Receiver Architecture in 0.18-µm SiGe BiCMOS for Radar and Communication Systems

Innovative circuit architectures and techniques to enhance the performance of several key BiCMOS RFIC building blocks applied in radar and wireless communication systems operating at the millimeter-wave frequencies are addressed in this dissertation. The former encapsulates the development of an advanced, low-cost and miniature millimeter-wave coexistent current mode direct conversion receiver for short-range, high-resolution radar and high data rate communication systems. A new class of broadband low power consumption active balun-LNA consisting of two common emitters amplifiers mutually coupled thru an AC stacked transformer for power saving and gain boosting. The active balun-LNA exhibits new high linearity technique using a constant gm cell transconductance independent of input-outputs variations based on equal emitters’ area ratios. A novel multi-stages active balun-LNA with innovative technique to mitigate amplitude and phase imbalances is proposed. The new multi-stages balun-LNA technique consists of distributed feed-forward averaging recycles correction for amplitude and phase errors and is insensitive to unequal paths parasitic from input to outputs. The distributed averaging recycles correction technique resolves the amplitude and phase errors residuals in a multi-iterative process. The new multi-stages balun-LNA averaging correction technique is frequency independent and can perform amplitude and phase calibrations without relying on passive lumped elements for compensation. The multi-stage balun-LNA exhibits excellent performance from 10 to 50 GHz with amplitude and phase mismatches less than 0.7 dB and 2.86º, respectively. Furthermore, the new multi-stages balun-LNA operates in current mode and shows high linearity with low power consumption. The unique balun-LNA design can operates well into mm-wave regions and is an integral block of the mm-wave radar and communication systems. The integration of several RFIC blocks constitutes the broadband millimeter-wave coexistent current mode direct conversion receiver architecture operating from 22- 44 GHz. The system and architectural level analysis provide a unique understanding into the receiver characteristics and design trade-offs. The RF front-end is based on the broadband multi-stages active balun-LNA coupled into a fully balanced passive mixer with an all-pass in-phase/quadrature phase generator. The trans-impedance amplifier converts the input signal current into a voltage gain at the outputs. Simultaneously, the high power input signal current is channelized into an anti-aliasing filter with 20 dB rejection for out of band interferers. In addition, the dissertation demonstrates a wide dynamic range system with small die area, cost effective and very low power consumption

A Millimeter-Wave Coexistent RFIC Receiver Architecture in 0.18-µm SiGe BiCMOS for Radar and Communication Systems

Innovative circuit architectures and techniques to enhance the performance of several key BiCMOS RFIC building blocks applied in radar and wireless communication systems operating at the millimeter-wave frequencies are addressed in this dissertation. The former encapsulates the development of an advanced, low-cost and miniature millimeter-wave coexistent current mode direct conversion receiver for short-range, high-resolution radar and high data rate communication systems. A new class of broadband low power consumption active balun-LNA consisting of two common emitters amplifiers mutually coupled thru an AC stacked transformer for power saving and gain boosting. The active balun-LNA exhibits new high linearity technique using a constant gm cell transconductance independent of input-outputs variations based on equal emitters’ area ratios. A novel multi-stages active balun-LNA with innovative technique to mitigate amplitude and phase imbalances is proposed. The new multi-stages balun-LNA technique consists of distributed feed-forward averaging recycles correction for amplitude and phase errors and is insensitive to unequal paths parasitic from input to outputs. The distributed averaging recycles correction technique resolves the amplitude and phase errors residuals in a multi-iterative process. The new multi-stages balun-LNA averaging correction technique is frequency independent and can perform amplitude and phase calibrations without relying on passive lumped elements for compensation. The multi-stage balun-LNA exhibits excellent performance from 10 to 50 GHz with amplitude and phase mismatches less than 0.7 dB and 2.86º, respectively. Furthermore, the new multi-stages balun-LNA operates in current mode and shows high linearity with low power consumption. The unique balun-LNA design can operates well into mm-wave regions and is an integral block of the mm-wave radar and communication systems. The integration of several RFIC blocks constitutes the broadband millimeter-wave coexistent current mode direct conversion receiver architecture operating from 22- 44 GHz. The system and architectural level analysis provide a unique understanding into the receiver characteristics and design trade-offs. The RF front-end is based on the broadband multi-stages active balun-LNA coupled into a fully balanced passive mixer with an all-pass in-phase/quadrature phase generator. The trans-impedance amplifier converts the input signal current into a voltage gain at the outputs. Simultaneously, the high power input signal current is channelized into an anti-aliasing filter with 20 dB rejection for out of band interferers. In addition, the dissertation demonstrates a wide dynamic range system with small die area, cost effective and very low power consumption

Low-Power Sliding Correlation CMOS UWB Pulsed Radar Receiver for Motion Detection

This paper presents a low-power coherent receiver for UWB pulsed Radar for motion detection. Due to accuracy of the radar motion detection, coherent detection scheme is adopted in the receiver. To relax the stringent requirement of timing synchronization, sliding correlation detection is proposed. The clocking step which determines detection resolution is determined by 2ns which is half of a pulse width or equivalent to 30cm. Receiver is designed in 0.13-μm CMOS process from 1.5 V supply. The pulse center frequency is 4GHz. The receiver includes a high voltage gain L3A, a analog correlator, a sampling comparator and a Flip Flop. The wholereceiver excluding an L3A consumes 0.9 mA of DC current and 10pJ/pulse

Phased Array Systems in Silicon

Phased array systems, a special case of MIMO systems, take advantage of spatial directivity and array gain to increase spectral efficiency. Implementing a phased array system at high frequency in a commercial silicon process technology presents several challenges. This article focuses on the architectural and circuit-level trade-offs involved in the design of the first silicon-based fully integrated phased array system operating at 24 GHz. The details of some of the important circuit building blocks are also discussed. The measured results demonstrate the feasibility of using integrated phased arrays for wireless communication and vehicular radar applications at 24 GHz

A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with −82dBm sensitivity for crystal-less wireless sensor nodes

A 65 nm CMOS 2.4 GHz wake-up receiver operating with low-accuracy frequency references has been realized. Robustness to frequency inaccuracy is achieved by employing non-coherent energy detection, broadband-IF heterodyne architecture and impulse-radio modulation. The radio dissipates 415 ¿W at 500 kb/s and achieves a sensitivity of -82 dBm with an energy efficiency of 830 pJ/bit.\u

Feasibility Study and Design of a Wearable System-on-a-Chip Pulse Radar for Contactless Cardiopulmonary Monitoring

A new system-on-a-chip radar sensor for next-generation wearable wireless interface applied to the human health care and safeguard is presented. The system overview is provided and the feasibility study of the radar sensor is presented. In detail, the overall system consists of a radar sensor for detecting the heart and breath rates and a low-power IEEE 802.15.4 ZigBee radio interface, which provides a wireless data link with remote data acquisition and control units. In particular, the pulse radar exploits 3.1–10.6 GHz ultra-wideband signals which allow a significant reduction of the transceiver complexity and then of its power consumption. The operating principle of the radar for the cardiopulmonary monitoring is highlighted and the results of the system analysis are reported. Moreover, the results obtained from the building-blocks design, the channel measurement, and the ultra-wideband antenna realization are reported

Real-time FPGA-based Radar Imaging for Smart Mobility Systems

The paper presents an X-band FMCW (Frequency Modulated Continuous Wave) Radar Imaging system, called X-FRI, for surveillance in smart mobility applications. X-FRI allows for detecting the presence of targets (e.g. obstacles in a railway crossing or urban road crossing, or ships in a small harbor), as well as their speed and their position. With respect to alternative solutions based on LIDAR or camera systems, X-FRI operates in real-time also in bad lighting and weather conditions, night and day. The radio-frequency transceiver is realized through COTS (Commercial Off The Shelf) components on a single-board. An FPGA-based baseband platform allows for real-time Radar image processing