Load balancing and scalable clos-network packet switches

In this dissertation three load-balancing Clos-network packet switches that attain 100% throughput and forward cells in sequence are introduced. The configuration schemes and the in-sequence forwarding mechanisms devised for these switches are also introduced. Also proposed is the use of matrix analysis as a tool for throughput analysis. In Chapter 2, a configuration scheme for a load-balancing Clos-network packet switch that has split central modules and buffers in between the split modules is introduced. This switch is called split-central-buffered Load-Balancing Clos-network (LBC) switch and it is cell based. The switch has four stages, namely input, central-input, central-output, and output stages. The proposed configuration scheme uses a pre-determined and periodic interconnection pattern in the input and split central modules to load-balance and route traffic. The LBC switch has low configuration complexity. The operation of the switch includes a mechanism applied at input and split-central modules to forward cells in sequence. The switch achieves 100% throughput under uniform and nonuniform admissible traffic with independent and identical distributions (i.i.d.). The high switching performance and low complexity of the switch are achieved while performing in-sequence forwarding and without resorting to memory speedup or central-stage expansion. This discussion includes both throughput analysis, where the operations that the configuration mechanism performs on the traffic traversing the switch are described, and a proof of in-sequence forwarding. Simulation analysis is presented as a practical demonstration of the switch performance on uniform and nonuniform i.i.d. traffic.In Chapter 3, a three-stage load balancing packet switch and its configuration scheme are introduced. The input- and central-stage switches are bufferless crossbars and the output-stage switches are buffered crossbars. This switch is called ThRee-stage Clos-network swItch and has queues at the middle stage and DEtermiNisTic scheduling (TRIDENT) and it is cell based. The proposed configuration scheme uses a pre-determined and periodic interconnection pattern in the input and central modules to load-balance and route traffic; therefore, it has low configuration complexity. The operation of the switch includes a mechanism applied at input and output modules to forward cells in sequence. In Chapter 4, a highly scalable load balancing three-stage Clos-network switch with Virtual Input-module output queues at ceNtral stagE (VINE) and crosspoint-buffers at output modules and its configuration scheme are introduced. VINE uses space switching in the first stage and buffered crossbars in the second and third stages. The proposed configuration scheme uses pre-determined and periodic interconnection patterns in the input modules for load balancing. The mechanism applied at the inputs, used to forward cells in sequence, is also introduced. VINE achieves 100% throughput under uniform and nonuniform admissible i.i.d. traffic. VINE achieves high switching performance, low configuration complexity, and in-sequence forwarding without resorting to memory speedup. In Chapter 5, matrix analysis is introduced as a tool for modeling, describing the internal operations, and analyzing the throughput of a packet switch

Indirect interconnection networks for high performance routers/switches

Routers form the backbone of the Internet; their kernel, structure, andconfiguration (scheduler) of the backplane (or switching fabrics) dominate the routers’performance, scalability, reliability and cost. As higher performance is required with therapid development of the network applications, router’s architecture has also evolvedfrom the shared backplane to switched backplane, which mainly uses the indirectinterconnection networks.The indirect interconnection networks include crossbar, MIN (multistageinterconnection networks) and some other irregular topologies. At present, most oftoday’s routers and switches are implemented on single crossbar with symmetric bufferarchitecture. In the first part of this dissertation, we introduce novel asymmetric bufferarchitecture for the crossbar in which a new port and a local shared bus are added. Wethen evaluate its performance and simulate under different bus arbitration and buffermanagement algorithms. Our studies indicate that we can get great improvement for thethroughput and low drop rate. Thus we could save a lot of expensive link bandwidth anddecrease the probability of congestion for the network.Single crossbar complexity increases at O(N2) in terms of crosspoint number,which become unacceptable for scalability as the port number (N) increases. A delta classself-routing MIN with complexity of O(N×log2N) has been widely used in the ATMswitches. But the reduction of crosspoint number results in considerable internal blocking.A number of scalable methods have been proposed to solve this problem. One of themuses more stages with recirculation architecture to reroute the deflected packets, whichgreatly increase the latency. In the second part of this dissertation, we propose aninterleaved multistage switching fabrics architecture and assess its throughput with ananalytical model and simulations. We compare this novel scheme with some previousparallel architectures and show its benefits. From extensive simulations under differenttraffic patterns and fault models, our interleaved architecture achieves better performancethan its counterpart of single panel fabric. Our interleaved scheme achieves speedups(over the single panel fabric) of 3.4 and 2.25 under uniform and hot-spot traffic patterns,respectively at maximum load (p=1). Moreover, the interleaved fabrics show greattolerance against internal hardware failures

Small signal modeling and analysis of microgrid systems

This dissertation focuses on small-signal modeling and analysis of inverter based microgrid systems. The proposed microgrid consists of two microsources placed on two different buses. The buses are connected using a distribution feeder with some impedance. The proposed microgrid can operate with the grid support, or without the grid support. When operated without the grid support, the standalone system’s microsources participate in controlling the system voltage and frequency. For a non-inertia source, such as the inverter, the load perturbations play an important role in system dynamics. In paper-I, such complex system was studied. In the grid-tied mode, the microsources share the load demand with other sources that are present in the main grid. The control algorithm for such system is much simpler than that of the islanded system. However, when aggregated in multi-bus system, prohibitively higher order state-space models are formed. In paper-II, a reduced order modeling of such systems was considered. Singular perturbation method was applied to identify the two time-scale property of the system. In paper-III, a similar approach was taken to develop a reduced order model of the islanded system that was developed in paper-I. Application of such reduced order models were illustrated by using them to simulate a modified IEEE-37 bus microgrid system. The islanded microgrids system’s stability is characterized in paper-IV by the Markov Jump Linear System Analysis. Conservative bounds on the expected value of the state were determined from a combination of the Markov process parameters, the dynamics of each linear system, and the magnitude of the impulses. The conclusions were verified with the simulation results. --Abstract, page iii

Bandwith allocation and scheduling in photonic networks

This thesis describes a framework for bandwidth allocation and scheduling in the Agile All-Photonic Network (AAPN). This framework is also applicable to any single-hop communication network with significant signalling delay (such as satellite-TDMA systems). Slot-by-slot scheduling approaches do not provide adequate performance for wide-area networks, so we focus on frame-based scheduling. We propose three novel fixed-length frame scheduling algorithms (Minimum Cost Search, Fair Matching and Minimum Rejection) and a feedback control system for stabilization.MCS is a greedy algorithm, which allocates time-slots sequentially using a cost function. This function is defined such that the time-slots with higher blocking probability are assigned first. MCS does not guarantee 100% throughput, thought it has a low blocking percentage. Our optimum scheduling approach is based on modifying the demand matrix such that the network resources are fully utilized, while the requests are optimally served. The Fair Matching Algorithm (FMA) uses the weighted max-min fairness criterion to achieve a fair share of resources amongst the connections in the network. When rejection is inevitable, FMA selects rejections such that the maximum percentage rejection experienced in the network is minimized. In another approach we formulate the rejection task as an optimization problem and propose the Minimum Rejection Algorithm (MRA), which minimizes total rejection. The minimum rejection problem is a special case of maximum flow problem. Due to the complexity of the algorithms that solve the max-flow problem we propose a heuristic algorithm with lower complexity.Scheduling in wide-area networks must be based on predictions of traffic demand and the resultant errors can lead to instability and unfairness. We design a feedback control system based on Smith's principle, which removes the destabilizing delays from the feedback loop by using a "loop cancelation" technique. The feedback control system we propose reduces the effect of prediction errors, increasing the speed of the response to sudden changes in traffic arrival rates and improving the fairness in the network through equalization of queue-lengths

Design Issues of Reserved Delivery Subnetworks

In this proposal, we introduce the reserved delivery subnetwork (RDS), a mechanism that can al-low information service providers to deliver more consistent service to their customers without perflow resource reservation. In addition to service performance improvements, reserved delivery sub-networks can also provide protection against network resource attacks. Many applications such asweb content delivery services and virtual private networks can benefit from reserved delivery sub-networks. We address a number of issues with the deployment of RDSs. First, we formulate theconfiguration problem of an RDS as a minimum concave cost network flow problem, where the perunit flow cost decreases as the current flow increases. An approximation heuristic is presented andstudied to solve this configuration problem. Second, we extend our study to the configuration prob-lem of RDSs with multiple sources. We also investigate the configuration problem for subnetworksthat allow load redistribution and load balancing among the sources. In addition, we plan to studyhow to use RDS proxies to regulate the flow of traffic to end users, so as to minimize network delay

Optimal Control of Power Quality in Microgrids Using Particle Swarm Optimisation

Driven by environmental protection, economic factors, conservation of energy resources, and technical challenges, the microgrid has emerged as an innovative small-scale power generation network. Microgrids consist of a cluster of Distributed Generation units that encompass a portion of an electric power distribution system and may rely on different energy sources. Functionally, the microgrid is required to provide adequate levels and quality of power to meet load demands. The issue of power quality is significant as it directly affects the characteristics of the microgrid’s operation. This problem can be defined as an occurrence of short to long periods of inadequate or unstable power outputs by the microgrid. In a stand-alone operation mode, the system voltage and frequency must be established by the microgrid, otherwise the system will collapse due to the variety in the microgrid component characteristics. The harmonic distortion of the output power waveforms is also a serious problem that often occurs because of the high speed operation of the converter switches. The long transient period is a critical issue that is usually caused by changing the operation mode or the load demand. Power sharing among the Distributed Generation units is also an important matter for sharing the load appropriately, particularly given that some renewable energy resources are not available continuously. In a utility connected microgrid, the reliable power quality mainly depends on the regulation of both active and reactive power, because the microgrid’s behaviour is mostly dominated by the bulk power system. Therefore, an optimal power control strategy is proposed in this thesis to improve the quality of the power supply in a microgrid scenario. This controller comprises an inner current control loop and an outer power control loop based on a synchronous reference frame and conventional PI regulators. The power control loop can operate in two modes: voltage-frequency power control mode and active-reactive power control mode. Particle Swarm Optimisation is an intelligent searching algorithm that is applied here for real-time self-tuning of the power control parameters. The voltage-frequency power controller is proposed for an inverter-based Distributed Generation unit in an autonomous operation mode. The results show satisfactory system voltage and frequency, high dynamic response, and an acceptable harmonic distortion level. The active-reactive power controller is adopted for an inverter-based Distributed Generation unit in a utility operation mode. This controller provides excellent regulation of the active and reactive power, in particular when load power has to be shared equally between the microgrid and utility. The voltage-frequency and active-reactive power control modes are used for a microgrid configured from two DG units in an autonomous operation mode. The proposed control strategy maintains the system voltage and frequency within acceptable limits, and injects sustained output power from one DG unit during a load change. The reliability of the system’s operation is investigated through developing a small-signal dynamic model for the microgrid. The results prove that the system was stable for the given operating point and under the proposed power controller. Consequently, this research reveals that the microgrid can successfully operate as a controllable power generation unit to support the utility, thus reducing the dependency on the bulk power system and increasing the market penetration of the micro-sources

Fabric-on-a-Chip: Toward Consolidating Packet Switching Functions on Silicon

The switching capacity of an Internet router is often dictated by the memory bandwidth required to bu¤er arriving packets. With the demand for greater capacity and improved service provisioning, inherent memory bandwidth limitations are encountered rendering input queued (IQ) switches and combined input and output queued (CIOQ) architectures more practical. Output-queued (OQ) switches, on the other hand, offer several highly desirable performance characteristics, including minimal average packet delay, controllable Quality of Service (QoS) provisioning and work-conservation under any admissible traffic conditions. However, the memory bandwidth requirements of such systems is O(NR), where N denotes the number of ports and R the data rate of each port. Clearly, for high port densities and data rates, this constraint dramatically limits the scalability of the switch. In an effort to retain the desirable attributes of output-queued switches, while significantly reducing the memory bandwidth requirements, distributed shared memory architectures, such as the parallel shared memory (PSM) switch/router, have recently received much attention. The principle advantage of the PSM architecture is derived from the use of slow-running memory units operating in parallel to distribute the memory bandwidth requirement. At the core of the PSM architecture is a memory management algorithm that determines, for each arriving packet, the memory unit in which it will be placed. However, to date, the computational complexity of this algorithm is O(N), thereby limiting the scalability of PSM switches. In an effort to overcome the scalability limitations, it is the goal of this dissertation to extend existing shared-memory architecture results while introducing the notion of Fabric on a Chip (FoC). In taking advantage of recent advancements in integrated circuit technologies, FoC aims to facilitate the consolidation of as many packet switching functions as possible on a single chip. Accordingly, this dissertation introduces a novel pipelined memory management algorithm, which plays a key role in the context of on-chip output- queued switch emulation. We discuss in detail the fundamental properties of the proposed scheme, along with hardware-based implementation results that illustrate its scalability and performance attributes. To complement the main effort and further support the notion of FoC, we provide performance analysis of output queued cell switches with heterogeneous traffic. The result is a flexible tool for obtaining bounds on the memory requirements in output queued switches under a wide range of tra¢ c scenarios. Additionally, we present a reconfigurable high-speed hardware architecture for real-time generation of packets for the various traffic scenarios. The work presented in this thesis aims at providing pragmatic foundations for designing next-generation, high-performance Internet switches and routers

Naval Reactors Physics Handbook. Volume 3: The Physics of Intermediate Spectrum Reactors

The present volume has been prepared for persons with some knowledge of the physics of nuclear reactors. It is intended to make available the accumulated physics experience of the Knolls Atomic Power Laboratory in its work on intermediate spectrum reactors. Only those portions have been selected which were deemed to be most useful and significant to other physicists concerned with the problems of reactor design. The volume is divided into four parts which are more or less independent of one another. Part 1 (Chaps. 2--9), Investigation of Reactor Characteristics by Critical Assemblies, reflects the importance of the properties of critical assemblies and of the techniques for obtaining experimental information about such assemblies. Part 2 (Chaps. 10--20), Reactivity Effects Associated with Reactor Operation, details the use of both critical assemblies and reactor theory to make and test predictions of the manner in which the reactivity of an intermediate power reactor will vary during operation. Part 3 (Chaps. 21--26), Heat Generation and Nuclear Materials Problems, considers how reactor heat generation is spread out in space and time, and what nuclear effects result from the presence of beryllium or sodium in the reactor. Part 4 (Chaps. 27--38), Reactor Kinetics and Temperature Coefficients, relates to the transient or near-transient behavior of intermediate reactors