A radial basis function neural network based approach for the electrical characteristics estimation of a photovoltaic module

The design process of photovoltaic (PV) modules can be greatly enhanced by using advanced and accurate models in order to predict accurately their electrical output behavior. The main aim of this paper is to investigate the application of an advanced neural network based model of a module to improve the accuracy of the predicted output I--V and P--V curves and to keep in account the change of all the parameters at different operating conditions. Radial basis function neural networks (RBFNN) are here utilized to predict the output characteristic of a commercial PV module, by reading only the data of solar irradiation and temperature. A lot of available experimental data were used for the training of the RBFNN, and a backpropagation algorithm was employed. Simulation and experimental validation is reported

Transient electrothermal simulation of power semiconductor devices

In this paper, a new thermal model based on the Fourier series solution of heat conduction equation has been introduced in detail. 1-D and 2-D Fourier series thermal models have been programmed in MATLAB/Simulink. Compared with the traditional finite-difference thermal model and equivalent RC thermal network, the new thermal model can provide high simulation speed with high accuracy, which has been proved to be more favorable in dynamic thermal characterization on power semiconductor switches. The complete electrothermal simulation models of insulated gate bipolar transistor (IGBT) and power diodes under inductive load switching condition have been successfully implemented in MATLAB/Simulink. The experimental results on IGBT and power diodes with clamped inductive load switching tests have verified the new electrothermal simulation model. The advantage of Fourier series thermal model over widely used equivalent RC thermal network in dynamic thermal characterization has also been validated by the measured junction temperature

Impact on signal integrity of interconnect variabilities

In this paper, literature results on the statistical simulation of lossy and dispersive interconnect networks with uncertain physical properties are extended to general nonlinear circuits. The approach is based on the expansion of circuit voltages and currents into polynomial chaos approximations. The derivation of deterministic circuit equivalents for nonlinear components allows to retrieve the unknown expansion coefficients with a single circuit simulation, that can be carried out via standard SPICE-type solvers. These coefficients provide direct statistical information. The methodology allows the inclusion of arbitrary nonlinear elements and is validated via transmission-line networks terminated by diodes and driven by inverter

NMOS-based integrated modular bypass for use in solar systems (NIMBUS): intelligent bypass for reducing partial shading power loss in solar panel applications

NMOS-based Integrated Modular Bypass for Use in Solar systems (NIMBUS) is designed as a replacement for the traditional bypass diode, used in common solar panels. Because of the series connection between the individual solar cells, the power output of a photovoltaic (PV) panel will drop disproportionally under partial shading. Currently, this is solved by dividing the PV panel into substrings, each with a diode bypass placed in parallel. This allows an alternative current path. However, the diodes still have a significant voltage drop (about 350 mV), and due to the fairly large currents in a panel, the diodes are dissipating power that we would rather see at the output of the panel. The NIMBUS chip, being a low-voltage-drop switch, aims to replace these diodes and, thus, reduce that power loss. NIMBUS is a smart bypass: a completely stand-alone system that detects the failing of one or more cells and activates when necessary. It is designed for a 100-mV voltage drop under a 5-A load current. When two or more NIMBUS chips are placed in parallel, an internal synchronization circuit ensures proper operation to provide for larger load currents. This paper will elaborate on the operation, design and implementation of the NIMBUS chip, as well as on the first measurements

Hardware design of LIF with Latency neuron model with memristive STDP synapses

In this paper, the hardware implementation of a neuromorphic system is presented. This system is composed of a Leaky Integrate-and-Fire with Latency (LIFL) neuron and a Spike-Timing Dependent Plasticity (STDP) synapse. LIFL neuron model allows to encode more information than the common Integrate-and-Fire models, typically considered for neuromorphic implementations. In our system LIFL neuron is implemented using CMOS circuits while memristor is used for the implementation of the STDP synapse. A description of the entire circuit is provided. Finally, the capabilities of the proposed architecture have been evaluated by simulating a motif composed of three neurons and two synapses. The simulation results confirm the validity of the proposed system and its suitability for the design of more complex spiking neural network

Modular multilevel converter with modified half-bridge submodule and arm filter for dc transmission systems with DC fault blocking capability

Although a modular multilevel converter (MMC) is universally accepted as a suitable converter topology for the high voltage dc transmission systems, its dc fault ride performance requires substantial improvement in order to be used in critical infrastructures such as transnational multi-terminal dc (MTDC) networks. Therefore, this paper proposes a modified submodule circuit for modular multilevel converter that offers an improved dc fault ride through performance with reduced semiconductor losses and enhanced control flexibility compared to that achievable with full-bridge submodules. The use of the proposed submodules allows MMC to retain its modularity; with semiconductor loss similar to that of the mixed submodules MMC, but higher than that of the half-bridge submodules. Besides dc fault blocking, the proposed submodule offers the possibility of controlling ac current in-feed during pole-to-pole dc short circuit fault, and this makes such submodule increasingly attractive and useful for continued operation of MTDC networks during dc faults. The aforesaid attributes are validated using simulations performed in MATLAB/SIMULINK, and substantiated experimentally using the proposed submodule topology on a 4-level small-scale MMC prototype