Tunable active inductor-based second-order all-pass filter as a time delay cell for multi-GHz operation

In this paper, a CMOS wideband second-order voltage-mode all-pass filter as a time delay cell is proposed. The proposed all-pass filter is made up of solely two transistors as active elements and four passive components. This filter demonstrates a group delay of approximately 60 ps within a bandwidth of 5 GHz, achieving maximum delay–bandwidth product. The proposed circuit is highly linear and has an input-referred 1-dB compression point P1dB of 2 dBm. The power consumption of the proposed circuit is only 10.3 mW. On the other hand, an active inductor is employed in the all-pass filter instead of a passive RLC tank; therefore, the three passive components are eliminated, in order to tune the time delay and improve the size. In this case, even though the power consumption increases, the time delay can be controlled across an improved bandwidth of approximately 10 GHz. Moreover, the circuit demonstrates a 1-dB compression point P1dB of 18 dBm. The proposed all-pass filter is simulated in TSMC 180-nm CMOS process parameters.Peer ReviewedPostprint (author's final draft

The development of a fully balanced current-tunable active-RC all-pass filter

This research paper presents a symmetrical current-tunable active-RC all-pass filter that uses an active BJT coupled with R and C. The circuit's symmetrical structure ensures that the differential signals are treated equally, resulting in improved performance. Furthermore, the filter's ability to adjust the frequency by bias current makes it suitable for a wide range of applications, such as improving phase properties and creating other types of filters. The simulation results obtained through the Pspice program show that the value of the operating frequency can be adjusted by bias current, which is the highlight of this research. The transfer function of the circuit shows a response of about 0 dB and –90° respectively, indicating that the circuit can change the phase of the input signal without changing its magnitude. This feature is particularly useful in signal processing applications where phase changes are required. In addition, the paper discusses how the operating frequency can be increased by decreasing the capacitor. The transfer function of the circuit analyzed shows that the operating frequency (f0) is inversely proportional to the product of the capacitors. Therefore, decreasing the value of C increases the operating frequency of the circuit. Monte Carlo analysis results are also presented for resistors, capacitors, and transistors with error values. This analysis helps determine the effect of errors on the output signal of the circuit. The results show that the output signal is sensitive to changes in the resistor values, which can affect the accuracy of the filter. Therefore, it is important to select high-quality resistors to ensure that the filter operates accuratel

Tunable active inductor-based second-order all-pass filter as a time delay cell for multi-GHz operation

In this paper, a CMOS wideband second-order voltage-mode all-pass filter as a time delay cell is proposed. The proposed all-pass filter is made up of solely two transistors as active elements and four passive components. This filter demonstrates a group delay of approximately 60 ps within a bandwidth of 5 GHz, achieving maximum delay–bandwidth product. The proposed circuit is highly linear and has an input-referred 1-dB compression point P1dB of 2 dBm. The power consumption of the proposed circuit is only 10.3 mW. On the other hand, an active inductor is employed in the all-pass filter instead of a passive RLC tank; therefore, the three passive components are eliminated, in order to tune the time delay and improve the size. In this case, even though the power consumption increases, the time delay can be controlled across an improved bandwidth of approximately 10 GHz. Moreover, the circuit demonstrates a 1-dB compression point P1dB of 18 dBm. The proposed all-pass filter is simulated in TSMC 180-nm CMOS process parameters.Peer Reviewe