Dielectric reliability of copper/low-k interconnects

Ph.DDOCTOR OF PHILOSOPH

FINITE ELEMENT AND IMAGING APPROACHES TO ANALYZE MULTISCALE ELECTROTHERMAL PHENOMENA

Electrothermal effects are crucial in the design and optimization of electronic devices. Thermoreflectance (TR) imaging enables transient thermal characterization at submicron to centimeter scales. Typically, finite element methods (FEM) are used to calculate the temperature profile in devices and ICs with complex geometry. By comparing theory and experiment, important material parameters and device characteristics are extracted. In this work we combine TR and FEM with image blurring/reconstruction techniques to improve electrothermal characterization of micron and nanoscale devices

Microstructure and processing effects on stress and reliability for through-silicon vias (TSVs) in 3D integrated circuits

Copper (Cu) Through-silicon via (TSV) is a key enabling element that provides the vertical connection between stacked dies in three-dimensional (3D) integration. The thermal expansion mismatch between Cu and Si induces complex stresses in and around the TSV structures, which can degrade the performance and reliability of 3DICs and are key concerns for technology development. In this dissertation, the effects of Cu microstructure and processing conditions on the stress characteristics and reliability of the TSV structure are studied. First, the stress characteristics of Cu TSV structures are investigated using the substrate curvature method. The substrate curvature measurement was supplemented by microstructure and finite element analyses (FEA) to investigate the mechanisms for the linear and nonlinear stress-temperature behaviors observed for the TSV structure. Implications of the near surface stress on carrier mobility change and device keep-out zone (KOZ) are discussed. Second, via extrusion, an important yield and reliability issue for 3D integration, is analyzed. Synchrotron x-ray microdiffraction technique was introduced for direct measurements of local stress and material behaviors in and around the TSV. Local plasticity near the top of the via was observed which provided direct experimental evidence to support the plasticity mechanism of via extrusion. An analytical model and FEA were used to analyze via extrusion based on local plasticity. Next, the effect of Cu microstructure effect on the thermomechanical behaviors of TSVs is investigated. The contribution from grain boundary and interfacial diffusion on via extrusion and the relaxation mechanisms are discussed. Potential approaches to minimize via extrusion are proposed. Finally, the stress characteristics of 3D die stack structures are studied using synchrotron x-ray microdiffraction. High resolution stress mappings were performed and verified by finite element analysis (FEA). FEA was further developed to estimate the stress effect on device mobility changes and the warpage of the integrated structure.Materials Science and Engineerin

Tunable Copper Microstructures in Blanket Films and Trenches Using Pulsed Electrodeposition

Copper interconnects in microelectronics have long been plagued with thermo-mechanical reliability issues. Control over the copper deposition process and resulting microstructure can dictate its material properties and reduce stresses as well as defects that form in the copper. In this thesis, pulse electrodeposition processing parameters were evaluated for their impact on the copper microstructure (grain size, texture, and twin density and stress state) through electron backscattering diffraction and wafer curvature measurements. Varying levels of constraint were also investigated for their effect on the copper microstructure to better understand the microstructures of more complex three-dimensional interconnects. Highly texture blanket copper films were deposited with various pulse frequencies and duty cycle, which was found to control grain size, orientation, and twin density. Higher twin densities were also observed in the films with lower residual stress. The findings from blanket film studies were carried over to trench deposited samples, where the influence of organic additives, typically used in the electrolytic bath to produce defect-free filling of advanced geometries, on the copper microstructure was studied. With the addition of organic additives, depositions produced finer grained structures with an increased contribution from the microstructure of the trench sidewall seed layer, especially with increasing trench aspect ratio. In addition, the increased constraint of the copper, resulted in larger stresses within the features and higher twin densities. The core of this dissertation demonstrated the ability to alter the resulting Cu microstructure through variations in pulse electrodeposition parameters

異種ダイレット積層を用いたフレキシブルハイブリッドデバイスの集積技術に関する研究

Tohoku University福島誉史課

Strain-Engineered MOSFETs

This book brings together new developments in the area of strain-engineered MOSFETs using high-mibility substrates such as SIGe, strained-Si, germanium-on-insulator and III-V semiconductors into a single text which will cover the materials aspects, principles, and design of advanced devices, their fabrication and applications. The book presents a full TCAD methodology for strain-engineering in Si CMOS technology involving data flow from process simulation to systematic process variability simulation and generation of SPICE process compact models for manufacturing for yield optimization

Review of Current Developments on High Strength Pipeline Steels for HIC Inducing Service

Nowadays, an increasing number of oil and gas transmission pipes are constructed with high-strength low alloy steels (HSLA); however, many of these pipelines suffer from different types of hydrogen damages, such as hydrogen-induced cracking (HIC). So many research efforts are being carried out to reduce the detrimental effects of hydrogen damage in HSLA steel pipes. The thermomechanical control process (TMCP) is a microstructural control technique that is able to eliminate the conventional heat treatment after hot rolling. Recent research demonstrated that TMCP provides high HIC resistance without adding high amounts of alloying elements or expensive heat treatments. However, once these HSLA steel pipes are put into service, they experience HIC damage, and the prediction of its kinetics is a necessary condition to perform Fitness-For-Service assessments. To develop a reliable predictive model for the kinetics of HIC, the relations among the microstructural features, environmental parameters, and mechanical properties have to be fully understood. This paper presents a review of the key metallurgical and processing factors to develop HSLA steel pipes, as well as a review of the phenomenological and empirical models of HIC kinetics in order to identify specific research directions for further investigations aimed to establish a reliable and sound model of HIC kinetics. &nbsp

Electrodeposition and characterisation of nickel-niobium-based diffusion barrier metallisations for high temperature electronics interconnections

The control of interfacial microstructural stability is of utmost importance to the reliability of liquid solder interconnects in high temperature electronic assemblies. This is primarily due to excessive intermetallic compounds (IMCs) that can form and continuously grow during high temperature operation, which practically renders conventional barrier metallisations inadequate. In this study, electrically conducting, NbOx containing Ni coatings were developed using electrodeposition. Their suitability as a solder diffusion barrier layer was assessed in terms of the electrical conductivity and barrier property. The present work explores a novel electrochemical route to produce Ni-NbOx composite coatings of good uniformity, compactness and purity, from non-aqueous glycol-based electrolytes consisting of NiCl2 and NbCl5 as metal precursors. The effects of cathodic current density and NaBH4 concentrations on the surface morphology, composition and thickness of the coatings were examined. A combined study of Scanning Transmission Electron Microscopy (STEM) and Electrochemical Quartz Crystal Microbalance (EQCM) was conducted to understand the fundamental aspects of this novel electrodeposition process. The composite coatings generally exhibited good electrical conductivity. The reaction behaviour between a liquid 52In-48Sn solder and Ni-NbOx, with Nb contents up to 6 at.%, were studied at 200ºC. The results indicate that, Ni-NbOx with sufficient layer thickness and higher Nb content, offered longer service lifetime. Nb enrichment was generally observed at or close to the reaction front after high temperature storage, which suggests evident effectiveness of the enhanced diffusion barrier characteristics

Ultra thin ultrafine-pitch chip-package interconnections for embedded chip last approach

Ever growing demands for portability and functionality have always governed the electronic technology innovations. IC downscaling with Moore s law and system miniaturization with System-On-Package (SOP) paradigm has resulted and will continue to result in ultraminiaturized systems with unprecedented functionality at reduced cost. The trend towards 3D silicon system integration is expected to downscale IC I/O pad pitches from 40µm to 1- 5 µm in future. Device- to- system board interconnections are typically accomplished today with either wire bonding or solders. Both of these are incremental and run into either electrical or mechanical barriers as they are extended to higher density of interconnections. Alternate interconnection approaches such as compliant interconnects typically require lengthy connections and are therefore limited in terms of electrical properties, although expected to meet the mechanical requirements. As supply currents will increase upto 220 A by 2012, the current density will exceed the maximum allowable current density of solders. The intrinsic delay and electromigration in solders are other daunting issues that become critical at nanometer size technology nodes. In addition, formation of intermetallics is also a bottleneck that poses significant mechanical issues. Recently, many research groups have investigated various techniques for copper-copper direct bonding. Typically, bonding is carried out at 400oC for 30 min followed by annealing for 30 min. High thermal budget in such process makes it less attractive for integrated systems because of the associated process incompatibilities. In the present study, copper-copper bonding at ultra fine-pitch using advanced nano-conductive and non-conductive adhesives is evaluated. The proposed copper-copper based interconnects using advanced conductive and non-conductive adhesives will be a new fundamental and comprehensive paradigm to solve all the four barriers: 1) I/O pitch 2) Electrical performance 3) Reliability and 4) Cost. This thesis investigates the mechanical integrity and reliability of copper-copper bonding using advanced adhesives through test vehicle fabrication and reliability testing. Test vehicles were fabricated using low cost electro-deposition techniques and assembled onto glass carrier. Experimental results show that proposed copper-copper bonding using advanced adhesives could potentially meet all the system performance requirements for the emerging micro/nano-systems.M.S.Committee Chair: Prof. Rao R Tummala; Committee Member: Dr. Jack Moon; Committee Member: Dr. P M Ra

Effects of scaling and grain structure on electromigration reliability of Cu interconnects

textElectromigration (EM) remains a major reliability concern for on-chip Cu interconnects due to the continuing scaling and the introduction of new materials and processes. In Cu interconnects, the atomic diffusion along the Cu/SiCN cap interface dominates the mass transport and thus controls EM reliability. The EM lifetime degrades by half for each new generation due to the scaling of the critical void volume which induces the EM failure. To improve the EM performance, a metal cap such as CoWP was applied to the Cu surface to suppress the interfacial diffusion. By this approach, two orders of magnitude improvement in the EM lifetime was demonstrated. For Cu lines narrower than 90 nm, the Cu grain structure degraded from bamboo-like grains to polycrystalline grains due to the insufficient grain growth in the trench. Such a change in Cu grain structures can increase the mass transport through grain boundaries and thus degrade the EM performance. The objective of this study is to investigate the scaling effect on EM lifetime and Cu microstructure, and more importantly, the grain structure effect on EM behaviors of Cu interconnects with the CoWP cap compared to those with the SiCN cap only. This thesis is organized into three parts. In the first part, the effect of via scaling on EM reliability was studied by examining two types of specially designed test structures. The EM lifetime degraded with the via size scaling because the critical void size that causes the EM failure is the same with the via size. The line scaling effect on Cu grain structures were identified by examining Cu lines down to 60 nm in width using both plan-view and cross-sectional view transmission electron microscopy. In the second part, the effect of grain structure was investigated by examining the EM lifetime, statistics and failure modes for Cu interconnects with different caps. A more significant effect of the grain structure on EM characteristics was observed for the CoWP cap compared to the SiCN cap. For the CoWP cap, the grain structure not only affected the mass transport rate along the Cu line, but also impacted the flux divergence site distribution which determined the voiding location and the lifetime statistics. Finally, the effect of grain structure on EM characteristics of CoWP capped Cu interconnects was examined using a microstructure-based statistical model. In this model, the microstructure of Cu interconnects was simplified as cluster and bamboo grains connected in series. Based on the weakest-link approximation, it was shown that the EM lifetime and statistics could be adequately modeled by combining the measured cluster length distribution with the EM lifetime-cluster length correlation for each individual failure unit.Electrical and Computer Engineerin