1,171 research outputs found
An 826 MOPS, 210 uW/MHz Unum ALU in 65 nm
To overcome the limitations of conventional floating-point number formats, an
interval arithmetic and variable-width storage format called universal number
(unum) has been recently introduced. This paper presents the first (to the best
of our knowledge) silicon implementation measurements of an
application-specific integrated circuit (ASIC) for unum floating-point
arithmetic. The designed chip includes a 128-bit wide unum arithmetic unit to
execute additions and subtractions, while also supporting lossless (for
intermediate results) and lossy (for external data movements) compression units
to exploit the memory usage reduction potential of the unum format. Our chip,
fabricated in a 65 nm CMOS process, achieves a maximum clock frequency of 413
MHz at 1.2 V with an average measured power of 210 uW/MHz
On the Non-Associativity of Analog Computations
The energy efficiency of analog forms of computing makes it one of the most
promising candidates to deploy resource-hungry machine learning tasks on
resource-constrained system such as mobile or embedded devices. However, it is
well known that for analog computations the safety net of discretization is
missing, thus all analog computations are exposed to a variety of imperfections
of corresponding implementations. Examples include non-linearities, saturation
effect and various forms of noise. In this work, we observe that the ordering
of input operands of an analog operation also has an impact on the output
result, which essentially makes analog computations non-associative, even
though the underlying operation might be mathematically associative. We conduct
a simple test by creating a model of a real analog processor which captures
such ordering effects. With this model we assess the importance of ordering by
comparing the test accuracy of a neural network for keyword spotting, which is
trained based either on an ordered model, on a non-ordered variant, and on real
hardware. The results prove the existence of ordering effects as well as their
high impact, as neglecting ordering results in substantial accuracy drops.Comment: Published at the ECML PKDD Conference 2023, at the 4th Workshop on
IoT, Edge, and Mobile for Embedded Machine Learnin
Hardware-Independent Proofs of Numerical Programs
On recent architectures, a numerical program may give different answers depending on the execution hardware and the compilation. Our goal is to formally prove properties about numerical programs that are true for multiple architectures and compilers. We propose an approach that states the rounding error of each floating-point computation whatever the environment. This approach is implemented in the Frama-C platform for static analysis of C code. Small case studies using this approach are entirely and automatically prove
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