33,846 research outputs found

    ATLAS Tile Calorimeter Readout Electronics Upgrade Program for the High Luminosity LHC

    Full text link
    The Tile Calorimeter (TileCal) is the hadronic calorimeter covering the most central region of the ATLAS experiment at LHC. The TileCal readout consists of about 10000 channels. The ATLAS upgrade program is divided in three phases: The Phase~0 occurs during 2013-2014, Phase~1 during 2018-1019 and finally Phase~2, which is foreseen for 2022-2023, whereafter the peak luminosity will reach 5-7 x 1034^{34} cm2^2s−1^{-1} (HL-LHC). The main TileCal upgrade is focused on the Phase~2 period. The upgrade aims at replacing the majority of the on- and off-detector electronics so that all calorimeter signals are directly digitized and sent to the off-detector electronics in the counting room. All new electronics must be able to cope with the increased radiation levels. An ambitious upgrade development program is pursued to study different electronics options. Three options are presently being investigated for the front-end electronic upgrade. The first option is an improved version of the present system built using commercial components, the second alternative is based on the development of a dedicated ASIC (Application Specific Integrated Circuit) and the third is the development of a new version of the QIE (Charge Integrator and Encoder) based on the one developed for Fermilab. All three options will use the same readout and control system using high speed (up to 40 Gb/s) links for communication and clock synchronization. For the off-detector electronics a new back-end architecture is being developed. A demonstrator prototype read-out for a slice of the calorimeter with most of the new electronics, but still compatible with the present system, is planned to be inserted in ATLAS already in mid 2014 (at the end of the Phase~0 upgrade).Comment: 6 pages, 6 figures, LISHEP 201

    ATLAS SCT POWER SUPPLY SYSTEM

    Get PDF
    The ATLAS SCT (semiconductor tracker) comprises 2112 barrel modules mounted on four concentric barrels of length 1.5m and up to 1m diameter, and 1976 endcap modules supported by a series of 9 wheels at each end of the barrel. Each module is powered by its own independent, floating low and high voltage power supplies, referenced to ground at the detector shield. Correspondingly, each module has its own distinct cable chain all the way back to the service cavern. This presentation outlines the structure and specification of the SCT Power Supply System, including the high level control software and operational model

    Hierarchical Control of the ATLAS Experiment

    Get PDF
    Control systems at High Energy Physics (HEP) experiments are becoming increasingly complex mainly due to the size, complexity and data volume associated to the front-end instrumentation. In particular, this becomes visible for the ATLAS experiment at the LHC accelerator at CERN. ATLAS will be the largest particle detector ever built, result of an international collaboration of more than 150 institutes. The experiment is composed of 9 different specialized sub-detectors that perform different tasks and have different requirements for operation. The system in charge of the safe and coherent operation of the whole experiment is called Detector Control System (DCS). This thesis presents the integration of the ATLAS DCS into a global control tree following the natural segmentation of the experiment into sub-detectors and smaller sub-systems. The integration of the many different systems composing the DCS includes issues such as: back-end organization, process model identification, fault detection, synchronization with external systems, automation of processes and supervisory control. Distributed control modeling is applied to the widely distributed devices that coexist in ATLAS. Thus, control is achieved by means of many distributed, autonomous and co-operative entities that are hierarchically organized and follow a finite-state machine logic. The key to integration of these systems lies in the so called Finite State Machine tool (FSM), which is based on two main enabling technologies: a SCADA product, and the State Manager Interface (SMI++) toolkit. The SMI++ toolkit has been already used with success in two previous HEP experiments providing functionality such as: an object-oriented language, a finite-state machine logic, an interface to develop expert systems, and a platform-independent communication protocol. This functionality is then used at all levels of the experiment operation process, ranging from the overall supervision down to device integration, enabling the overall sequencing and automation of the experiment. Although the experience gained in the past is an important input for the design of the detector's control hierarchy, further requirements arose due to the complexity and size of ATLAS. In total, around 200.000 channels will be supervised by the DCS and the final control tree will be hundreds of times bigger than any of the antecedents. Thus, in order to apply a hierarchical control model to the ATLAS DCS, a common approach has been proposed to ensure homogeneity between the large-scale distributed software ensembles of sub-detectors. A standard architecture and a human interface have been defined with emphasis on the early detection, monitoring and diagnosis of faults based on a dynamic fault-data mechanism. This mechanism relies on two parallel communication paths that manage the faults while providing a clear description of the detector conditions. The DCS information is split and handled by different types of SMI++ objects; whilst one path of objects manages the operational mode of the system, the other is to handle eventual faults. The proposed strategy has been validated through many different tests with positive results in both functionality and performance. This strategy has been successfully implemented and constitutes the ATLAS standard to build the global control tree. During the operation of the experiment, the DCS, responsible for the detector operation, must be synchronized with the data acquisition system which is in charge of the physics data taking process. The interaction between both systems has so far been limited, but becomes increasingly important as the detector nears completion. A prototype implementation, ready to be used during the sub-detector integration, has achieved data reconciliation by mapping the different segments of the data acquisition system into the DCS control tree. The adopted solution allows the data acquisition control applications to command different DCS sections independently and prevents incorrect physics data taking caused by a failure in a detector part. Finally, the human-machine interface presents and controls the DCS data in the ATLAS control room. The main challenges faced during the design and development phases were: how to support the operator in controlling this large system, how to maintain integration across many displays, and how to provide an effective navigation. These issues have been solved by combining the functionalities provided by both, the SCADA product and the FSM tool. The control hierarchy provides an intuitive structure for the organization of many different displays that are needed for the visualization of the experiment conditions. Each node in the tree represents a workspace that contains the functional information associated with its abstraction level within the hierarchy. By means of an effective navigation, any workspace of the control tree is accessible by the operator or detector expert within a common human interface layout. The interface is modular and flexible enough to be accommodated to new operational scenarios, fulfil the necessities of the different kind of users and facilitate the maintenance during the long lifetime of the detector of up to 20 years. The interface is in use since several months, and the sub-detector's control hierarchies, together with their associated displays, are currently being integrated into the common human-machine interface

    Design and hardware evaluation of the optical-link system for the ATLAS Liquid Argon Calorimeter Phase-II Upgrade

    Full text link
    An optical link system is being developed for the ATLAS Liquid Argon Calorimeter Phase-II upgrade. The optical link system is responsible for transmit the data of over 182 thousand detector channels from 1524 Front-End Boards (FEBs) through 26 optical fibers per FEB over 150 meters to the counting room and brings clocks, bunch crossing reset signals and slow control/monitoring signals back to the FEBs. The optical link system is based on the Low-Power GigaBit Transceivers (lpGBTs) and the Versatile optical Transceiver (VTRx+) modules, which both are being developed for the High-Luminosity LHC upgrade. An evaluation board is designed and the major functions of the optical link system are being evaluated. The design of the optical link system and the evaluation of major functions are presented in the paper.Comment: 12 pages, 8 figure

    DEMONSTRATOR SYSTEM FOR THE PHASE-I UPGRADE OF THE TRIGGER READOUT ELECTRONICS OF THE ATLAS LIQUID ARGON CALORIMETERS AT THE LHC

    Get PDF
    I started my Ph.D. at the Physics Department of the Universit`a degli Studi di Milano in November 2014. I carried out my research activity within the ATLAS experiment at the Large Hadron Collider (LHC) at CERN, mainly focusing on the upgrade of the ATLAS Liquid Argon (LAr) electromagnetic calorimeter Phase-I trigger electronics. The main topic of my doctoral project is the implementation of VHDL firmware for the Field Programmable Gate Arrays (FPGAs) of the new calorimeter trigger electronics. I spent the first of the three Ph.D. years working in Milano and the last two years at CERN, supported by a contract awarded from the ATLAS LAr calorimeter group. During the three years of activity, I contributed to the development and maintenance of the FPGA readout firmware for the LAr Phase-I demonstrator system, set up and installed in the ATLAS detector during summer 2014. The purpose of the system is to validate the energy reconstruction and collect real collision data using a pre-prototype of the future front-end and back-end electronics. In addition, I joined the group working on the firmware development for the FPGAs of the new Phase-I back-end boards. I was asked to be in charge of the firmware module for decoding the Timing Trigger and Control (TTC) signals coming from the LHC central trigger processor

    ATLAS silicon module assembly and qualification tests at IFIC Valencia

    Full text link
    ATLAS experiment, designed to probe the interactions of particles emerging out of proton proton collisions at energies of up to 14 TeV, will assume operation at the Large Hadron Collider (LHC) at CERN in 2007. This paper discusses the assembly and the quality control tests of forward detector modules for the ATLAS silicon microstrip detector assembled at the Instituto de Fisica Corpuscular (IFIC) in Valencia. The construction and testing procedures are outlined and the laboratory equipment is briefly described. Emphasis is given on the module quality achieved in terms of mechanical and electrical stability.Comment: 23 pages, 38 EPS figures, uses JINST LaTeX clas

    Results from the Commissioning of the ATLAS Pixel Detector with Cosmic data

    Full text link
    The ATLAS pixel detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. With approximately 80 million readout channels, the ATLAS silicon pixel detector is a high-acceptance, high-resolution, low-noise tracking device. Providing the desired refinement in charged track pattern recognition capability in order to meet the stringent track reconstruction requirements, the pixel detector largely defines the ability of ATLAS to effectively resolve primary and secondary vertices and perform efficient flavor tagging essential for discovery of new physics. Being the last sub-system installed in ATLAS by July 2007, the pixel detector was successfully connected, commissioned, and tested in situ while meeting an extremely tight schedule, and was ready to take data upon the projected turn-on of the LHC. Since fall 2008, the pixel detector has been included in the combined ATLAS detector operation, collecting cosmic muon data. Details from the pixel detector installation and commissioning, as well as details on calibration procedures and the results obtained with collected cosmic data, are presented along with a summary of the detector status.Comment: To be published in the proceedings of DPF-2009, Detroit, MI, July 2009, eConf C090726. Contents: 9 pages, 13 figures, 9 reference

    Tile Calorimeter Upgrade Program for the Luminosity Increasing at the LHC

    Full text link
    The Tile Calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS experiment at the Large Hadron Collider (LHC). The LHC is scheduled to undergo a major upgrade, in 2022, for the High Luminosity LHC (HL-LHC). The ATLAS upgrade program for high luminosity is split into three phases: Phase-0 occurred during 2013−20142013-2014 and prepared the LHC for Run 2; Phase-I, foreseen for 2019, will prepare the LHC for Run 3, whereafter the peak luminosity reaches 2−3×10342-3 \times 10^{34} cm2s−1^{2}s^{-1}; finally, Phase-II, which is foreseen for 2024, will prepare the collider for the HL-LHC operation (5−7×10345-7 \times 10^{34} cm2s−1^{2}s^{-1}). The TileCal main activities for Phase-0 were the installation of the new low voltage power supplies and the activation of the TileCal third layer signal for assisting the muon trigger at 1.0<∣η∣<1.31.0<|\eta|<1.3 (TileMuon Project). In Phase-II, a major upgrade in the TileCal readout electronics is planned. Except for the photomultipliers tubes (PMTs), most of the on- and off-detector electronics will be replaced, with the aim of digitizing all PMT pulses at the front-end level. This work describes the TileCal upgrade activities, focusing on the TileMuon Project and the new on-detector electronics.Comment: arXiv admin note: substantial text overlap with arXiv:1305.085

    Readout Electronics Tests and Integration of the ATLAS Semiconductor Tracker

    Get PDF
    The SemiConductor Tracker (SCT) together with the Pixel detector and the Transition Radiation Tracker (TRT) form the central tracking system of the ATLAS experiment at the LHC. It consists of single-sided microstrip silicon sensors, which are read out via binary ASICs based on the DMILL technology, and the data are transmitted via radiation-hard optical fibres. After an overview of the SCT detector layout and readout system, the final-stage assembly of large-scale structures and the integration with the TRT is presented. The focus is on the electrical performance of the overall SCT detector system through the different integration stages, including the detector control and data acquisition system.Comment: 5 pages, 12 figures, Contributed to 12th Workshop On Electronics For LHC And Future Experiments (LECC 2006), 25-29 September 2006, Valencia, Spai

    A mobile data acquisition system

    Get PDF
    A mobile data aquisition (MobiDAQ) was developed for the ATLAS central hadronic calorimeter (TileCal). MobiDAQ has been designed in order to test the functionalities of the TileCal front-end electronics and to acquire calibration data before the final back-end electronics were built and tested. MobiDAQ was also used to record the first cosmic ray events acquired by an ATLAS subdetector in the underground experimental area
    • 

    corecore