Knowledge-based out-of-core algorithms for data management in visualization

Journal ArticleData management is the very first issue in handling very large datasets. Many existing out-of-core algorithms used in visualization are closely coupled with application-specific logic. This paper presents two knowledgebased out-of-core prefetching algorithms that do not use hard-coded rendering-related logic. They acquire the knowledge of the access history and patterns dynamically, and adapt their prefetching strategies accordingly. We have compared the algorithms with a demand-based algorithm, as well as a more domain-specific out-of-core algorithm. We carried out our evaluation in conjunction with an example application where rendering multiple point sets in a volume scene graph put a great strain on the rendering algorithm in terms of memory management. Our results have shown that the knowledge-based approach offers a better cache-hit to disk-access trade-off. This work demonstrates that it is possible to build an out-of-core prefetching algorithm without depending on rendering-related application-specific logic. The knowledge based approach has the advantage of being generic, efficient, flexible and self-adaptive

Relative Interval Analysis of Paging Algorithms on Access Graphs

Access graphs, which have been used previously in connection with competitive analysis and relative worst order analysis to model locality of reference in paging, are considered in connection with relative interval analysis. The algorithms LRU, FIFO, FWF, and FAR are compared using the path, star, and cycle access graphs. In this model, some of the expected results are obtained. However, although LRU is found to be strictly better than FIFO on paths, it has worse performance on stars, cycles, and complete graphs, in this model. We solve an open question from [Dorrigiv, Lopez-Ortiz, Munro, 2009], obtaining tight bounds on the relationship between LRU and FIFO with relative interval analysis.Comment: IMADA-preprint-c

CLAM: Compiler Lease of Cache Memory

Caching is a common solution to the data movement performance bottleneck of today’s computational systems and networks. Traditional caching examines program behavior and cache optimization separately, limiting performance. Recently, a new cache policy called Compiler Lease of cAche Memory (CLAM), has been suggested for program-based cache management. CLAM manages cache memory by allowing the compiler to assign leases, or lifespans, to cached items over a hardware-software interface, known as lease cache. Lease cache affords new performance potential, by way of program-driven cache optimization. It is applicable to existing cache architecture optimizations, and can be used to emulate other cache policies. This paper presents the first functional hardware implementation of lease cache for CLAM support. Lease cache hardware architecture is first presented, along with CLAM hardware support systems. The cache is emulated on an FPGA, and benchmarked using a collection of scientific kernels from the PolyBench/C suite, for three CLAM lease assignment policies: Compiler Assigned Reference Leasing (CARL), Phased Reference Leasing (PRL), and Fixed Uniform Leasing (FUL). CARL and PRL are able to achieve superior performance to Least Recently Used (LRU) replacement, while FUL is shown to serve as a safety mechanism for CLAM. Novel spectrum-based cache tenancy analysis verifies PRL’s effectiveness in limiting cache utilization, and can identify changes in the working-set that cause the policy to perform adversely. This suggests that CLAM is extendable to more complex workloads if working-set transitions can elicit a similar change in lease policy. Being able to do so could yield appreciable performance improvements for large and highly iterative workloads like tensors

Optimal Eviction Policies for Stochastic Address Traces

The eviction problem for memory hierarchies is studied for the Hidden Markov Reference Model (HMRM) of the memory trace, showing how miss minimization can be naturally formulated in the optimal control setting. In addition to the traditional version assuming a buffer of fixed capacity, a relaxed version is also considered, in which buffer occupancy can vary and its average is constrained. Resorting to multiobjective optimization, viewing occupancy as a cost rather than as a constraint, the optimal eviction policy is obtained by composing solutions for the individual addressable items. This approach is then specialized to the Least Recently Used Stack Model (LRUSM), a type of HMRM often considered for traces, which includes V-1 parameters, where V is the size of the virtual space. A gain optimal policy for any target average occupancy is obtained which (i) is computable in time O(V) from the model parameters, (ii) is optimal also for the fixed capacity case, and (iii) is characterized in terms of priorities, with the name of Least Profit Rate (LPR) policy. An O(log C) upper bound (being C the buffer capacity) is derived for the ratio between the expected miss rate of LPR and that of OPT, the optimal off-line policy; the upper bound is tightened to O(1), under reasonable constraints on the LRUSM parameters. Using the stack-distance framework, an algorithm is developed to compute the number of misses incurred by LPR on a given input trace, simultaneously for all buffer capacities, in time O(log V) per access. Finally, some results are provided for miss minimization over a finite horizon and over an infinite horizon under bias optimality, a criterion more stringent than gain optimality.Comment: 37 pages, 3 figure

The evaluation of computer performance by means of state-dependent queueing network models

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Analysis of some algorithms for use on paged virtual memory computers

PhD ThesisHandling a single page fault involves execution of thousands of instructions, drum rotational delay and is usually so expensive that if it can be avoided, almost any other cost can be tolerated. Optimizing operating system performance is usually the main concern of computer seientists who deal with paged memories. However, redesigning the algorithm used by a problem program can often result in a very significant reduction in paging, and hence in program execution time. The redesigned algorithm frequently does not satisfy the more conventional efficiency criteria. A sorting algorithm, Hash Coding and other search algorithms are considered. Analytic and simulation studies are presented, and aome modifications are proposed to reduce the number of page faults produced by data set references. Analysis is in terms of three of the most commonly used page replacement algorithms i.e. least recently used, first in first out, and random selection. The modifications are for the most part relatively minor and in some cases have appeared elsewhere in the context of searching on external storage media. The important aspects are the dramatic performance improvements which are possible, and the fact that classical internal algorithms are inappropriate for use in a paged virtual memory system.The Science Research Council: The University of Newcastle Upon Tyne: International Business Machines (United Kingdom) Limited.

Recursive structure in computer systems

PhD ThesisStructure plays a important part in the design of large systems. Unstructured programs are difficult to design or test and good structure has been recognized as essential to all but the smallest programs. Similarly, concurrently executing computers must co-operate in a structured way if an uncontrolled growth in complexity is to be avoided. The thesis presented here is that recursive structure can be used to organize and simplify large programs and highly parallel computers. In programming, naming concerns the way names are used to identify objects. Various naming schemes are examined including 'block structured' and 'pathname' naming. A new scheme is presented as a synthesis of these two combining most of their advantages. Recursively structured naming is shown to be an advantage when programs are to be de-composed or combined to an arbitrary degree. Also, a contribution to the UNIX United/Newcastle Connection distributed operating system design is described. This shows how recursive naming was used in a practical system. Computation concerns the progress of execution in a computer. A distinction is made between control driven computation where the programmer has explicit control over sequencing and data driven or demand driven computation where sequencing is implicit. It is shown that recursively structured computation has attractive locality properties. The definition of a recursive structure may itself be cyclic (self-referencing). A new resource management ('garbage collection') algorithm is presented which can manage cyclic structures without costs proportional to the system size. The scheme is an extension of 'reference counting'. Finally the need for structure in program and computer design and the advantages of recursive structure are discussed.The Science and Engineering Research Council of Great Britain