32 research outputs found

    Energy Efficient Engine (E3) controls and accessories detail design report

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    An Energy Efficient Engine program has been established by NASA to develop technology for improving the energy efficiency of future commercial transport aircraft engines. As part of this program, a new turbofan engine was designed. This report describes the fuel and control system for this engine. The system design is based on many of the proven concepts and component designs used on the General Electric CF6 family of engines. One significant difference is the incorporation of digital electronic computation in place of the hydromechanical computation currently used

    1996 Projects Day Booklet

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    https://scholarworks.seattleu.edu/projects-day/1011/thumbnail.jp

    Heat pipe embedded AlSiC plates for high conductivity - low CTE heat spreaders

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    A Novel Silicon Micromachined Integrated MCM Thermal Management System

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    "Micromachining" is a chemical means of etching three-dimensional structures, typically in single- crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (Micro Electro Mechanical Systems), where in addition to the ordinary two-dimensional (planar) microelectronics, it is possible to build three-dimensional n-ticromotors, electrically- actuated raicrovalves, hydraulic systems and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor n-ticrofabfication. The University of Cincinnati group in collaboration with Karl Baker at NASA Lewis were the first to form micro heat pipes in silicon by the above techniques. Current work now in progress using MEMS technology is now directed towards the development of the next generation in MCM (Multi Chip Module) packaging. Here we propose to develop a complete electronic thermal management system which will allow densifica6on in chip stacking by perhaps two orders of magnitude. Furthermore the proposed technique will allow ordinary conu-nercial integrated chips to be utilized. Basically, the new technique involves etching square holes into a silicon substrate and then inserting and bonding commercially available integrated chips into these holes. For example, over a 100 1/4 in. by 1 /4 in. integrated chips can be placed on a 4 in. by 4 in. silicon substrate to form a Multi-Chip Module (MCM). Placing these MCM's in-line within an integrated rack then allows for three-diniensional stacking. Increased miniaturization of microelectronic circuits will lead to very high local heat fluxes. A high performance thermal management system will be specifically designed to remove the generated energy. More specifically, a compact heat exchanger with milli / microchannels will be developed and tested to remove the heat through the back side of this MCM assembly for moderate and high heat flux applications, respectively. The high heat load application of particular interest in mind is the motor controller developed by Martin Marietta for Nasa to control the thruster's directional actuators on space vechicles. Work is also proposed to develop highly advanced and improved porous wick structures for use in advanced heat loops. The porous wick will be micromachined from silicon using MEMS technology, thus permitting far superior control of pore size and pore distribution (over wicks made from sintered n-ietals), which in turn is expected to led to significantly improved heat loop performance

    Advancing MEMS Technology Usage through the MUMPS (Multi-User MEMS Processes) Program

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    In order to help provide access to advanced micro-electro-mechanical systems (MEMS) technologies and lower the barriers for both industry and academia, the Microelectronic Center of North Carolina (MCNC) and ARPA have developed a program which provides users with access to both MEMS processes and advanced electronic integration techniques. The four distinct aspects of this program, the multi-user MEMS processes (MUMP's), the consolidated micro-mechanical element library, smart MEMS, and the MEMS technology network are described in this paper. MUMP's is an ARPA-supported program created to provide inexpensive access to MEMS technology in a multi-user environment. It is both a proof-of-concept and educational tool that aids in the development of MEMS in the domestic community. MUMP's technologies currently include a 3-layer poly-silicon surface micromachining process and LIGA (lithography, electroforming, and injection molding) processes that provide reasonable design flexibility within set guidelines. The consolidated micromechanical element library (CaMEL) is a library of active and passive MEMS structures that can be downloaded by the MEMS community via the internet. Smart MEMS is the development of advanced electronics integration techniques for MEMS through the application of flip chip technology. The MEMS technology network (TechNet) is a menu of standard substrates and MEMS fabrication processes that can be purchased and combined to create unique process flows. TechNet provides the MEMS community greater flexibility and enhanced technology accessibility

    Aeronautical engineering: A continuing bibliography with indexes (supplement 318)

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    This bibliography lists 217 reports, articles, and other documents introduced into the NASA scientific and technical information system in June 1995. Subject coverage includes: design, construction and testing of aircraft and aircraft engines; aircraft components, equipment, and systems; ground support systems; and theoretical and applied aspects of aerodynamics and general fluid dynamics

    GSFC Cutting Edge Avionics Technologies for Spacecraft

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    With the launch of NASA's first fiber optic bus on SAMPEX in 1992, GSFC has ushered in an era of new technology development and insertion into flight programs. Predating such programs the Lewis and Clark missions and the New Millenium Program, GSFC has spearheaded the drive to use cutting edge technologies on spacecraft for three reasons: to enable next generation Space and Earth Science, to shorten spacecraft development schedules, and to reduce the cost of NASA missions. The technologies developed have addressed three focus areas: standard interface components, high performance processing, and high-density packaging techniques enabling lower cost systems. To realize the benefits of standard interface components GSFC has developed and utilized radiation hardened/tolerant devices such as PCI target ASICs, Parallel Fiber Optic Data Bus terminals, MIL-STD-1773 and AS1773 transceivers, and Essential Services Node. High performance processing has been the focus of the Mongoose I and Mongoose V rad-hard 32-bit processor programs as well as the SMEX-Lite Computation Hub. High-density packaging techniques have resulted in 3-D stack DRAM packages and Chip-On-Board processes. Lower cost systems have been demonstrated by judiciously using all of our technology developments to enable "plug and play" scalable architectures. The paper will present a survey of development and insertion experiences for the above technologies, as well as future plans to enable more "better, faster, cheaper" spacecraft. Details of ongoing GSFC programs such as Ultra-Low Power electronics, Rad-Hard FPGAs, PCI master ASICs, and Next Generation Mongoose processors
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