4 research outputs found
Analysis of simultaneous operations and memory conflict in a multimemory computer system
Includes bibliographic references (p. 23)
A multiprocessor system using a switch matrix configuration
This thesis describes a class of interconnection networks based on the use of a switch matrix to provide processor to memory communication. This switch allows a direct link between any processor to any memory module. The cost and performance of this network are analytically examined. The results are compared with those of a multiprocessor system using a time-shared bus configuration and it is shown that for the two extreme cases of maximum and minimum throughput, the two approaches are equivalent from a performance point of view. However, in the general case, even with a higher cost, the switch matrix provides a much better performance than the time-shared bus configuration. Furthermore, the architecture of a multiprocessor MIMD type computer using a switch matrix is investigated and Petri net techniques are used to model process coordination among processors --Abstract, page ii
On the Ordering of Connections for Automatic Wire Routing
Coordinated Science Laboratory was formerly known as Control Systems LaboratoryJoint Services Electronics program / DAAB-07-67-C-0199National Science Foundation / NSF GK-15459Army Research Office - Durham / DAHC 04-72-C-0001Rome Air Development Center / USAF 30(602)-414
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A block method approach to solving the Laplace equation on a parallel computer
This paper continues exploration in the area of
programming for parallel computers. The appendix to the
paper contains an extensive survey of the literature related
to parallel computers and parallel programming techniques.
The paper itself presents a new approach to solving
the Laplace equation on a. parallel computer. A new
"block" method, the Accelerated Alternating Halves method,
is found to be consistently better than the Accelerated
Point Gauss-Seidel method or the Accelerated Line Gauss-
Seidel method when used on a parallel processor computer