CORPORATE SOCIAL RESPONSIBILITY IN ROMANIA

The purpose of this paper is to identify the main opportunities and limitations of corporate social responsibility (CSR). The survey was defined with the aim to involve the highest possible number of relevant CSR topics and give the issue a more wholesome perspective. It provides a basis for further comprehension and deeper analyses of specific CSR areas. The conditions determining the success of CSR in Romania have been defined in the paper on the basis of the previously cumulative knowledge as well as the results of various researches. This paper provides knowledge which may be useful in the programs promoting CSR.Corporate social responsibility, Supportive policies, Romania

Optimization of electronic protection testing for the F/A-18 active guidance air-to-air weapon system

The AIM-120A Advanced Medium Range Air-to-Air Missile (AMRAAM) is the premier air-to-air missile in the US arsenal. Although designed to counter threats that employ analog-based Electronic Attack (EA), the new threat of digital-based EA, Digital Radio Frequency Memory (DRFM), places a high priority on the capability to evaluate AMRAAM\u27 s Electronic Protection (EP), which is defined as the capability to counter EA. AMRAAM effectiveness is not only dependent on its own capability to counter EA, but also on the ability of the fighter aircraft radar to counter the same EA while supporting the AMRAAM ( via data links) during the AMRAAM\u27 s intercept profile. In the US Navy, the AMRAAM is carried by the F/A-18. EP testing of the two versions of F/A-18 radar has been limited due to funding constraints and other higher priority testing of the various capabilities associated with the air-to-air and air-to-ground F/A-18 mission requirements. In 1996, the US Navy funded the Weapon System Evaluation program, which includes EP testing of the F/A-18 and AMRAAM weapon system. Current test methods involve captive carriage of the AMRAAM against full-scale targets employing specific EA techniques. Radar data links to the missile are recorded in flight and replayed in the Hard-Ware In The Loop (HWIL) simulator to test missile performance during simulated missile intercept of the same EA threat. Twenty simulations are executed in the HWIL for each test flight to calculate missile probability of guidance (Po). For each HWIL simulation, 50 lethality simulations are executed to calculate probability of weapon effectiveness (PWE), Final products of the test program are a table illustrating Po and a bar chart illustrating PWE against several specific EA threats, including in both cases performance of the missile with perfect aircraft radar support to isolate missile performance. Neither the table nor the chart includes uncertainty associated with the calculated probabilities. A closer look at the test methods revealed that only a few tests of aircraft radar are used to characterize aircraft radar performance versus the EA threat while thousands of simulations are used to characterize AMRAAM performance. For the average number of test runs of each radar mode, the uncertainty associated with the aircraft radar performance calculation was found to be± 43.6% while the uncertainty associated with AMRAAM performance calculation was found to be± 1.39% (using 95% confidence interval). The combined uncertainty is± 44.4%, which spans a wide range of performance for any calculation of Po or PWE. The large uncertainty does not offer a solid foundation on which to base fighter tactics. Three methods of increasing the number of radar performance data were investigated for the purpose of decreasing the uncertainty associated with EP testing. First, synthetic data link file generation was determined to be ineffective because the data link error files were not stationary or ergotic, signal characteristics that are required for accurate generation of data link files. Second, time shift expansion, which involves generation of additional data link files (more radar performance data) from the recorded aircraft radar track files, was found to have some potential to reduce uncertainty. More evaluation would be necessary to quantify effectiveness. However, the effectiveness of time shift expansion would be limited at best because it does not add to the general characterization of aircraft radar performance against EA (no new radar performance runs, only more data from existing runs). Third, the NA VAIR Weapons Division China Lake F/A-18 radar laboratory was researched as a method for generating more radar simulations against EA to more fully characterize radar performance. Utilization of the radar laboratory was determined to be by far the best technique for optimizing weapons system testing. The higher cost associated with more independent aircraft radar runs would reduce the number of test flights per year by one (due to the fixed budget), but the dramatic reduction in uncertainty (from± 44.4% to± 20.5%) would be well worth the cost. Calculating PWE against four types of EA within 20.5% is much more valuable than calculating PWE for five types within 44.4%. The AMRAAM will remain in the US arsenal for many more years, and will face many new threats. The AMRAAM Integrated Project Team should pursue incorporation of the radar laboratory simulations into the EP testing process to significantly improve the accuracy associated with evaluation of weapon system performance. Additionally, NA VAIR should work towards long-term co-development of coupled systems such as the F/ A-18 radar and the AMRAAM to save money and to increase overall performance by allowing optimization of the weapon system through coherent development of system components

Canadian Defence Commitments: Overview and Status of Selected Acquisitions and Initiatives

For years, successive Canadian governments have been overpromising and under-delivering on defence procurement. Timetables have slipped even as repair and maintenance costs for aging equipment have soared, while elaborate rules have obscured the acquisition process in a bureaucratic fog. This paper assembles information from a wide range of official sources and cuts through the confusion. It surveys 15 Canadian defence acquisitions and initiatives, each anticipated to cost more than $100 million, to account for the delays. Final replacements for the ancient Sea King helicopters are no closer to arriving — after almost 30 years — because the DND failed to recognize that it asked for technology that is still in development. The Joint Support Ship project is years behind schedule because, as originally conceived, it sought to integrate so many capabilities that it was unbuildable. The Integrated Soldier System Project is almost as far behind because Ottawa’s procurement rules are so complex and niggling that no bidder could fulfill every single one. Canada faces evolving threats, but efforts to equip the Canadian Forces to meet them have been marked by a long litany of failures — failures of communication, of organization and of vision. This paper sets out the military procurement process, and concisely explains the most egregious flaws, making it essential reading for anyone interested in the future of Canada’s military

Space Suit Attachment Quick Release System

NASA plans to make it back to the Moon by 2024 with their Artemis Program, and stay there for a longer period of time to conduct research which will support the future of space exploration. While on the lunar surface, astronauts need to maximize their efficiency by carrying tools on their Exploration Extravehicular Mobility Unit (xEMU), and to accommodate this need, the Extravehicular Activity (EVA) Tools Team is pursuing a utility belt concept. The objective of this project is to develop a system capable of interfacing between the utility belt and any given tool, while also accommodating numerous restrictions and obstacles present on the lunar surface. The design proposed in the Final Design Review Report is a two-piece system made of the tool probe and belt receptacle. The tool probe is made of a wire frame flexure which locks the system in place when docked. The receptacle half is a simple two rung sleeve. This document outlines the final design concept, including the preliminary design process, initial background research, preliminary design concept, design requirements, project timeline, design justification, final design manufacturing procedure, and design verification

Real-Time Systems: Reflections on higher education in the Czech Republic, Hungary, Poland and Slovenia

Real-time systems (An ICT definition)\ud In real-time multiprocessing there is the extra requirement that the system complete its response to any input within a certain critical time. This poses additional problems, particularly in situations where the system is heavily loaded and is subject to many\ud simultaneous demands. Real-time systems are always dedicated. Most systems are not real-time

An Evaluation Of AVID As A Supplemental Education Program At The Middle School Level

This is a study of AVID as a supplemental education program at the middle school level that includes a quantitative evaluation of the academic efficacy of AVID utilizing anonymized, longitudinal student achievement data. The second section is a qualitative evaluation of the AVID program at one middle school within a district to determine the perceived efficacy of the AVID program among stakeholders using surveys and interviews. This also includes a discussion of the necessary change in leadership determined by the evaluation portions of this project. The third portion outlines a policy change essential for satisfactory outcome as defined by AVID national criteria for the middle school to move from a Highly Certified Site to Demonstration School status

New Fault Detection, Mitigation and Injection Strategies for Current and Forthcoming Challenges of HW Embedded Designs

Tesis por compendio[EN] Relevance of electronics towards safety of common devices has only been growing, as an ever growing stake of the functionality is assigned to them. But of course, this comes along the constant need for higher performances to fulfill such functionality requirements, while keeping power and budget low. In this scenario, industry is struggling to provide a technology which meets all the performance, power and price specifications, at the cost of an increased vulnerability to several types of known faults or the appearance of new ones. To provide a solution for the new and growing faults in the systems, designers have been using traditional techniques from safety-critical applications, which offer in general suboptimal results. In fact, modern embedded architectures offer the possibility of optimizing the dependability properties by enabling the interaction of hardware, firmware and software levels in the process. However, that point is not yet successfully achieved. Advances in every level towards that direction are much needed if flexible, robust, resilient and cost effective fault tolerance is desired. The work presented here focuses on the hardware level, with the background consideration of a potential integration into a holistic approach. The efforts in this thesis have focused several issues: (i) to introduce additional fault models as required for adequate representativity of physical effects blooming in modern manufacturing technologies, (ii) to provide tools and methods to efficiently inject both the proposed models and classical ones, (iii) to analyze the optimum method for assessing the robustness of the systems by using extensive fault injection and later correlation with higher level layers in an effort to cut development time and cost, (iv) to provide new detection methodologies to cope with challenges modeled by proposed fault models, (v) to propose mitigation strategies focused towards tackling such new threat scenarios and (vi) to devise an automated methodology for the deployment of many fault tolerance mechanisms in a systematic robust way. The outcomes of the thesis constitute a suite of tools and methods to help the designer of critical systems in his task to develop robust, validated, and on-time designs tailored to his application.[ES] La relevancia que la electrónica adquiere en la seguridad de los productos ha crecido inexorablemente, puesto que cada vez ésta copa una mayor influencia en la funcionalidad de los mismos. Pero, por supuesto, este hecho viene acompañado de una necesidad constante de mayores prestaciones para cumplir con los requerimientos funcionales, al tiempo que se mantienen los costes y el consumo en unos niveles reducidos. En este escenario, la industria está realizando esfuerzos para proveer una tecnología que cumpla con todas las especificaciones de potencia, consumo y precio, a costa de un incremento en la vulnerabilidad a múltiples tipos de fallos conocidos o la introducción de nuevos. Para ofrecer una solución a los fallos nuevos y crecientes en los sistemas, los diseñadores han recurrido a técnicas tradicionalmente asociadas a sistemas críticos para la seguridad, que ofrecen en general resultados sub-óptimos. De hecho, las arquitecturas empotradas modernas ofrecen la posibilidad de optimizar las propiedades de confiabilidad al habilitar la interacción de los niveles de hardware, firmware y software en el proceso. No obstante, ese punto no está resulto todavía. Se necesitan avances en todos los niveles en la mencionada dirección para poder alcanzar los objetivos de una tolerancia a fallos flexible, robusta, resiliente y a bajo coste. El trabajo presentado aquí se centra en el nivel de hardware, con la consideración de fondo de una potencial integración en una estrategia holística. Los esfuerzos de esta tesis se han centrado en los siguientes aspectos: (i) la introducción de modelos de fallo adicionales requeridos para la representación adecuada de efectos físicos surgentes en las tecnologías de manufactura actuales, (ii) la provisión de herramientas y métodos para la inyección eficiente de los modelos propuestos y de los clásicos, (iii) el análisis del método óptimo para estudiar la robustez de sistemas mediante el uso de inyección de fallos extensiva, y la posterior correlación con capas de más alto nivel en un esfuerzo por recortar el tiempo y coste de desarrollo, (iv) la provisión de nuevos métodos de detección para cubrir los retos planteados por los modelos de fallo propuestos, (v) la propuesta de estrategias de mitigación enfocadas hacia el tratamiento de dichos escenarios de amenaza y (vi) la introducción de una metodología automatizada de despliegue de diversos mecanismos de tolerancia a fallos de forma robusta y sistemática. Los resultados de la presente tesis constituyen un conjunto de herramientas y métodos para ayudar al diseñador de sistemas críticos en su tarea de desarrollo de diseños robustos, validados y en tiempo adaptados a su aplicación.[CA] La rellevància que l'electrònica adquireix en la seguretat dels productes ha crescut inexorablement, puix cada volta més aquesta abasta una major influència en la funcionalitat dels mateixos. Però, per descomptat, aquest fet ve acompanyat d'un constant necessitat de majors prestacions per acomplir els requeriments funcionals, mentre es mantenen els costos i consums en uns nivells reduïts. Donat aquest escenari, la indústria està fent esforços per proveir una tecnologia que complisca amb totes les especificacions de potència, consum i preu, tot a costa d'un increment en la vulnerabilitat a diversos tipus de fallades conegudes, i a la introducció de nous tipus. Per oferir una solució a les noves i creixents fallades als sistemes, els dissenyadors han recorregut a tècniques tradicionalment associades a sistemes crítics per a la seguretat, que en general oferixen resultats sub-òptims. De fet, les arquitectures empotrades modernes oferixen la possibilitat d'optimitzar les propietats de confiabilitat en habilitar la interacció dels nivells de hardware, firmware i software en el procés. Tot i això eixe punt no està resolt encara. Es necessiten avanços a tots els nivells en l'esmentada direcció per poder assolir els objectius d'una tolerància a fallades flexible, robusta, resilient i a baix cost. El treball ací presentat se centra en el nivell de hardware, amb la consideració de fons d'una potencial integració en una estratègia holística. Els esforços d'esta tesi s'han centrat en els següents aspectes: (i) la introducció de models de fallada addicionals requerits per a la representació adequada d'efectes físics que apareixen en les tecnologies de fabricació actuals, (ii) la provisió de ferramentes i mètodes per a la injecció eficient del models proposats i dels clàssics, (iii) l'anàlisi del mètode òptim per estudiar la robustesa de sistemes mitjançant l'ús d'injecció de fallades extensiva, i la posterior correlació amb capes de més alt nivell en un esforç per retallar el temps i cost de desenvolupament, (iv) la provisió de nous mètodes de detecció per cobrir els reptes plantejats pels models de fallades proposats, (v) la proposta d'estratègies de mitigació enfocades cap al tractament dels esmentats escenaris d'amenaça i (vi) la introducció d'una metodologia automatitzada de desplegament de diversos mecanismes de tolerància a fallades de forma robusta i sistemàtica. Els resultats de la present tesi constitueixen un conjunt de ferramentes i mètodes per ajudar el dissenyador de sistemes crítics en la seua tasca de desenvolupament de dissenys robustos, validats i a temps adaptats a la seua aplicació.Espinosa García, J. (2016). New Fault Detection, Mitigation and Injection Strategies for Current and Forthcoming Challenges of HW Embedded Designs [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/73146TESISCompendi

Fewer Mistakes on the First Day: Architectural Strategies and Their Impacts on Acquisition Outcomes

Tenth Annual Acquisition Research Symposium Acquisition ManagementExcerpt from the Proceedings of the Tenth Annual Acquisition Research Symposium Acquisition ManagementNaval Postgraduate School Acquisition Research ProgramPrepared for the Naval Postgraduate School, Monterey, CANaval Postgraduate School Acquisition Research ProgramApproved for public release; distribution is unlimited