Validating module network learning algorithms using simulated data

In recent years, several authors have used probabilistic graphical models to learn expression modules and their regulatory programs from gene expression data. Here, we demonstrate the use of the synthetic data generator SynTReN for the purpose of testing and comparing module network learning algorithms. We introduce a software package for learning module networks, called LeMoNe, which incorporates a novel strategy for learning regulatory programs. Novelties include the use of a bottom-up Bayesian hierarchical clustering to construct the regulatory programs, and the use of a conditional entropy measure to assign regulators to the regulation program nodes. Using SynTReN data, we test the performance of LeMoNe in a completely controlled situation and assess the effect of the methodological changes we made with respect to an existing software package, namely Genomica. Additionally, we assess the effect of various parameters, such as the size of the data set and the amount of noise, on the inference performance. Overall, application of Genomica and LeMoNe to simulated data sets gave comparable results. However, LeMoNe offers some advantages, one of them being that the learning process is considerably faster for larger data sets. Additionally, we show that the location of the regulators in the LeMoNe regulation programs and their conditional entropy may be used to prioritize regulators for functional validation, and that the combination of the bottom-up clustering strategy with the conditional entropy-based assignment of regulators improves the handling of missing or hidden regulators.Comment: 13 pages, 6 figures + 2 pages, 2 figures supplementary informatio

Devices and architectures for large scale integrated silicon photonics circuits

We present DWDM nanophotonics architectures based on microring resonator modulators and detectors. We focus on two implementations: an on chip interconnect for multicore processor (Corona) and a high radix network switch (HyperX). Based on the requirements of these applications we discuss the key constraints on the photonic circuits' devices and fabrication techniques as well as strategies to improve their performance

Late Innovation Strategies in Asian Electronics Industries: A Conceptual Framework and Illustrative Evidence

This paper was published in Oxford Development Studies special issue in honor of the late Professor Linsu Kim. The paper reviews evidence on the evolution of electronics design in Asia's leading electronics exporting countries, to establish what capabilities have been developed, and to shed light on the forces that are driving "late innovation" strategies. It also reviews intellectual sources that can be used to theoretically ground these hypotheses. Using a well-known taxonomy of innovation that distinguishes incremental, modular, architectural and radical innovations, and the concept of "disruptive technologies", I argue that Asian firms may have realistic chances to engage in incremental innovations as well as in architectural innovations. However, to sustain "late innovation" strategies over a longer period, "complex system integration" capabilities are necessary to provide the missing link.

Initial synchronisation of wideband and UWB direct sequence systems: single- and multiple-antenna aided solutions

This survey guides the reader through the open literature on the principle of initial synchronisation in single-antenna-assisted single- and multi-carrier Code Division Multiple Access (CDMA) as well as Direct Sequence-Ultra WideBand (DS-UWB) systems, with special emphasis on the DownLink (DL). There is a paucity of up-to-date surveys and review articles on initial synchronization solutions for MIMO-aided and cooperative systems - even though there is a plethora of papers on both MIMOs and on cooperative systems, which assume perfect synchronization. Hence this paper aims to ?ll the related gap in the literature

Internationalisation of Innovation: Why Chip Design Moving to Asia

This paper will appear in International Journal of Innovation Management, special issue in honor of Keith Pavitt, (Peter Augsdoerfer, Jonathan Sapsed, and James Utterback, guest editors), forthcoming. Among Keith Pavitt's many contributions to the study of innovation is the proposition that physical proximity is advantageous for innovative activities that involve highly complex technological knowledge But chip design, a process that creates the greatest value in the electronics industry and that requires highly complex knowledge, is experiencing a massive dispersion to leading Asian electronics exporting countries. To explain why chip design is moving to Asia, the paper draws on interviews with 60 companies and 15 research institutions that are doing leading-edge chip design in Asia. I demonstrate that "pull" and "policy" factors explain what attracts design to particular locations. But to get to the root causes that shift the balance in favor of geographical decentralization, I examine "push" factors, i.e. changes in design methodology ("system-on-chip design") and organization ("vertical specialization" within global design networks). The resultant increase in knowledge mobility explains why chip design - that, in Pavitt's framework is not supposed to move - is moving from the traditional centers to a few new specialized design clusters in Asia. A completely revised and updated version has been published as: " Complexity and Internationalisation of Innovation: Why is Chip Design Moving to Asia?," in International Journal of Innovation Management, special issue in honour of Keith Pavitt, Vol. 9,1: 47-73.

Improving the Lives of Young Children: Opportunities for Care Coordination and Case Management for Children Receiving Services for Developmental Delay

Summarizes new opportunities for states to develop a coordinated system of care for children receiving early childhood intervention and services and how providers can support effective care coordination and case management policies

A Communication Monitor for Wireless Sensor Networks Based on Software Defined Radio

Link quality estimation of reliability-crucial wireless sensor networks (WSNs) is often limited by the observability and testability of single-chip radio transceivers. The estimation is often based on collection of packer-level statistics, including packet reception rate, or vendor-specific registers, such as CC2420's Received Signal Strength Indicator (RSSI) and Link Quality Indicator (LQI). The speed or accuracy of such metrics limits the performance of reliability mechanisms built in wireless sensor networks. To improve link quality estimation in WSNs, we designed a powerful wireless communication monitor based on Software Defined Radio (SDR). We studied the relations between three implemented link quality metrics and packet reception rate under different channel conditions. Based on a comparison of the metrics' relative advantages, we proposed using a combination of them for fast and accurate estimation of a sensor network link