Current-Mode Techniques for the Implementation of Continuous- and Discrete-Time Cellular Neural Networks

This paper presents a unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) cellular neural networks (CNN) using CMOS current-mode analog techniques. The net input signals are currents instead of voltages as presented in previous approaches, thus avoiding the need for current-to-voltage dedicated interfaces in image processing tasks with photosensor devices. Outputs may be either currents or voltages. Cell design relies on exploitation of current mirror properties for the efficient implementation of both linear and nonlinear analog operators. These cells are simpler and easier to design than those found in previously reported CT and DT-CNN devices. Basic design issues are covered, together with discussions on the influence of nonidealities and advanced circuit design issues as well as design for manufacturability considerations associated with statistical analysis. Three prototypes have been designed for l.6-pm n-well CMOS technologies. One is discrete-time and can be reconfigured via local logic for noise removal, feature extraction (borders and edges), shadow detection, hole filling, and connected component detection (CCD) on a rectangular grid with unity neighborhood radius. The other two prototypes are continuous-time and fixed template: one for CCD and other for noise removal. Experimental results are given illustrating performance of these prototypes

Significance Driven Hybrid 8T-6T SRAM for Energy-Efficient Synaptic Storage in Artificial Neural Networks

Multilayered artificial neural networks (ANN) have found widespread utility in classification and recognition applications. The scale and complexity of such networks together with the inadequacies of general purpose computing platforms have led to a significant interest in the development of efficient hardware implementations. In this work, we focus on designing energy efficient on-chip storage for the synaptic weights. In order to minimize the power consumption of typical digital CMOS implementations of such large-scale networks, the digital neurons could be operated reliably at scaled voltages by reducing the clock frequency. On the contrary, the on-chip synaptic storage designed using a conventional 6T SRAM is susceptible to bitcell failures at reduced voltages. However, the intrinsic error resiliency of NNs to small synaptic weight perturbations enables us to scale the operating voltage of the 6TSRAM. Our analysis on a widely used digit recognition dataset indicates that the voltage can be scaled by 200mV from the nominal operating voltage (950mV) for practically no loss (less than 0.5%) in accuracy (22nm predictive technology). Scaling beyond that causes substantial performance degradation owing to increased probability of failures in the MSBs of the synaptic weights. We, therefore propose a significance driven hybrid 8T-6T SRAM, wherein the sensitive MSBs are stored in 8T bitcells that are robust at scaled voltages due to decoupled read and write paths. In an effort to further minimize the area penalty, we present a synaptic-sensitivity driven hybrid memory architecture consisting of multiple 8T-6T SRAM banks. Our circuit to system-level simulation framework shows that the proposed synaptic-sensitivity driven architecture provides a 30.91% reduction in the memory access power with a 10.41% area overhead, for less than 1% loss in the classification accuracy.Comment: Accepted in Design, Automation and Test in Europe 2016 conference (DATE-2016

Smart-Pixel Cellular Neural Networks in Analog Current-Mode CMOS Technology

This paper presents a systematic approach to design CMOS chips with concurrent picture acquisition and processing capabilities. These chips consist of regular arrangements of elementary units, called smart pixels. Light detection is made with vertical CMOS-BJT’s connected in a Darlington structure. Pixel smartness is achieved by exploiting the Cellular Neural Network paradigm [1], [2], incorporating at each pixel location an analog computing cell which interacts with those of nearby pixels. We propose a current-mode implementation technique and give measurements from two 16 x 16 prototypes in a single-poly double-metal CMOS n-well 1.6-µm technology. In addition to the sensory and processing circuitry, both chips incorporate light-adaptation circuitry for automatic contrast adjustment. They obtain smart-pixel densities up to 89 units/mm2, with a power consumption down to 105 µW/unit and image processing times below 2 µs

Reconfigurable Architectures and Systems for IoT Applications

abstract: Internet of Things (IoT) has become a popular topic in industry over the recent years, which describes an ecosystem of internet-connected devices or things that enrich the everyday life by improving our productivity and efficiency. The primary components of the IoT ecosystem are hardware, software and services. While the software and services of IoT system focus on data collection and processing to make decisions, the underlying hardware is responsible for sensing the information, preprocess and transmit it to the servers. Since the IoT ecosystem is still in infancy, there is a great need for rapid prototyping platforms that would help accelerate the hardware design process. However, depending on the target IoT application, different sensors are required to sense the signals such as heart-rate, temperature, pressure, acceleration, etc., and there is a great need for reconfigurable platforms that can prototype different sensor interfacing circuits. This thesis primarily focuses on two important hardware aspects of an IoT system: (a) an FPAA based reconfigurable sensing front-end system and (b) an FPGA based reconfigurable processing system. To enable reconfiguration capability for any sensor type, Programmable ANalog Device Array (PANDA), a transistor-level analog reconfigurable platform is proposed. CAD tools required for implementation of front-end circuits on the platform are also developed. To demonstrate the capability of the platform on silicon, a small-scale array of 24×25 PANDA cells is fabricated in 65nm technology. Several analog circuit building blocks including amplifiers, bias circuits and filters are prototyped on the platform, which demonstrates the effectiveness of the platform for rapid prototyping IoT sensor interfaces. IoT systems typically use machine learning algorithms that run on the servers to process the data in order to make decisions. Recently, embedded processors are being used to preprocess the data at the energy-constrained sensor node or at IoT gateway, which saves considerable energy for transmission and bandwidth. Using conventional CPU based systems for implementing the machine learning algorithms is not energy-efficient. Hence an FPGA based hardware accelerator is proposed and an optimization methodology is developed to maximize throughput of any convolutional neural network (CNN) based machine learning algorithm on a resource-constrained FPGA.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Optimisation of stand-alone hydrogen-based renewable energy systems using intelligent techniques

Wind and solar irradiance are promising renewable alternatives to fossil fuels due to their availability and topological advantages for local power generation. However, their intermittent and unpredictable nature limits their integration into energy markets. Fortunately, these disadvantages can be partially overcome by using them in combination with energy storage and back-up units. However, the increased complexity of such systems relative to single energy systems makes an optimal sizing method and appropriate Power Management Strategy (PMS) research priorities. This thesis contributes to the design and integration of stand-alone hybrid renewable energy systems by proposing methodologies to optimise the sizing and operation of hydrogen-based systems. These include using intelligent techniques such as Genetic Algorithm (GA), Particle Swarm Optimisation (PSO) and Neural Networks (NNs). Three design aspects: component sizing, renewables forecasting, and operation coordination, have been investigated. The thesis includes a series of four journal articles. The first article introduced a multi-objective sizing methodology to optimise standalone, hydrogen-based systems using GA. The sizing method was developed to calculate the optimum capacities of system components that underpin appropriate compromise between investment, renewables penetration and environmental footprint. The system reliability was assessed using the Loss of Power Supply Probability (LPSP) for which a novel modification was introduced to account for load losses during transient start-up times for the back-ups. The second article investigated the factors that may influence the accuracy of NNs when applied to forecasting short-term renewable energy. That study involved two NNs: Feedforward, and Radial Basis Function in an investigation of the effect of the type, span and resolution of training data, and the length of training pattern, on shortterm wind speed prediction accuracy. The impact of forecasting error on estimating the available wind power was also evaluated for a commercially available wind turbine. The third article experimentally validated the concept of a NN-based (predictive) PMS. A lab-scale (stand-alone) hybrid energy system, which consisted of: an emulated renewable power source, battery bank, and hydrogen fuel cell coupled with metal hydride storage, satisfied the dynamic load demand. The overall power flow of the constructed system was controlled by a NN-based PMS which was implemented using MATLAB and LabVIEW software. The effects of several control parameters, which are either hardware dependent or affect the predictive algorithm, on system performance was investigated under the predictive PMS, this was benchmarked against a rulebased (non-intelligent) strategy. The fourth article investigated the potential impact of NN-based PMS on the economic and operational characteristics of such hybrid systems. That study benchmarked a rule-based PMS to its (predictive) counterpart. In addition, the effect of real-time fuel cell optimisation using PSO, when applied in the context of predictive PMS was also investigated. The comparative analysis was based on deriving the cost of energy, life cycle emissions, renewables penetration, and duty cycles of fuel cell and electrolyser units. The effects of other parameters such the LPSP level, prediction accuracy were also investigated. The developed techniques outperformed traditional approaches by drawing upon complex artificial intelligence models. The research could underpin cost-effective, reliable power supplies to remote communities as well as reducing the dependence on fossil fuels and the associated environmental footprint

Layout-level Circuit Sizing and Design-for-manufacturability Methods for Embedded RF Passive Circuits

The emergence of multi-band communications standards, and the fast pace of the consumer electronics markets for wireless/cellular applications emphasize the need for fast design closure. In addition, there is a need for electronic product designers to collaborate with manufacturers, gain essential knowledge regarding the manufacturing facilities and the processes, and apply this knowledge during the design process. In this dissertation, efficient layout-level circuit sizing techniques, and methodologies for design-for-manufacturability have been investigated. For cost-effective fabrication of RF modules on emerging technologies, there is a clear need for design cycle time reduction of passive and active RF modules. This is important since new technologies lack extensive design libraries and layout-level electromagnetic (EM) optimization of RF circuits become the major bottleneck for reduced design time. In addition, the design of multi-band RF circuits requires precise control of design specifications that are partially satisfied due to manufacturing variations, resulting in yield loss. In this work, a broadband modeling and a layout-level sizing technique for embedded inductors/capacitors in multilayer substrate has been presented. The methodology employs artificial neural networks to develop a neuro-model for the embedded passives. Secondly, a layout-level sizing technique for RF passive circuits with quasi-lumped embedded inductors and capacitors has been demonstrated. The sizing technique is based on the circuit augmentation technique and a linear optimization framework. In addition, this dissertation presents a layout-level, multi-domain DFM methodology and yield optimization technique for RF circuits for SOP-based wireless applications. The proposed statistical analysis framework is based on layout segmentation, lumped element modeling, sensitivity analysis, and extraction of probability density functions using convolution methods. The statistical analysis takes into account the effect of thermo-mechanical stress and process variations that are incurred in batch fabrication. Yield enhancement and optimization methods based on joint probability functions and constraint-based convex programming has also been presented. The results in this work have been demonstrated to show good correlation with measurement data.Ph.D.Committee Chair: Swaminathan, Madhavan; Committee Member: Fathianathan, Mervyn; Committee Member: Lim, Sung Kyu; Committee Member: Peterson, Andrew; Committee Member: Tentzeris, Mano

SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips

This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing chips based on cellular neural networks. SIRENA includes capabilities for: (a) the description of nominal and non-ideal operation of CNN analogue circuitry at the behavioural level; (b) performing realistic simulations of the transient evolution of physical CNNs including deviations due to second-order effects of the hardware; and, (c) evaluating sensitivity figures, and realize noise and Monte Carlo simulations in the time domain. These capabilities portray SIRENA as better suited for CNN chip development than algorithmic simulation packages (such as OpenSimulator, Sesame) or conventional neural networks simulators (RCS, GENESIS, SFINX), which are not oriented to the evaluation of hardware non-idealities. As compared to conventional electrical simulators (such as HSPICE or ELDO-FAS), SIRENA provides easier modelling of the hardware parasitics, a significant reduction in computation time, and similar accuracy levels. Consequently, iteration during the design procedure becomes possible, supporting decision making regarding design strategies and dimensioning. SIRENA has been developed using object-oriented programming techniques in C, and currently runs under the UNIX operating system and X-Windows framework. It employs a dedicated high-level hardware description language: DECEL, fitted to the description of non-idealities arising in CNN hardware. This language has been developed aiming generality, in the sense of making no restrictions on the network models that can be implemented. SIRENA is highly modular and composed of independent tools. This simplifies future expansions and improvements.Comisión Interministerial de Ciencia y Tecnología TIC96-1392-C02-0

Stand-alone solar-pv hydrogen energy systems incorporating reverse osmosis

The world’s increasing energy demand means the rate at which fossil fuels are consumed has increased resulting in greater carbon dioxide emissions. For many small (marginalised) or coastal communities, access to potable water is limited alongside good availability of renewable energy sources (solar or wind). One solution is to utilise small-scale renewably powered stand-alone energy systems to help supply power for everyday utilities and to operate desalination systems serving potable water (drinking) needs reducing diesel generator dependence. In such systems, on-site water production is essential so as to service electrolysis for hydrogen generation for Proton Exchange Membrane (PEM) fuel cells. Whilst small Reverse Osmosis (RO) units may function as a (useful) dump load, it also directly impacts the power management of stand-alone energy systems and affects operational characteristics. However, renewable energy sources are intermittent in nature, thus power generation from renewables may not be adequate to satisfy load demands. Therefore, energy storage and an effective Power Management Strategy (PMS) are vital to ensure system reliability. This thesis utilises a combination of experiments and modelling to analyse the performance of renewably powered stand-alone energy systems consisting of photovoltaic panels, PEM electrolysers, PEM fuel cells, batteries, metal hydrides and Reverse Osmosis (RO) under various scenarios. Laboratory experiments have been done to resolve time-resolved characteristics for these system components and ascertain their impact on system performance. However, the main objective of the study is to ascertain the differences between applying (simplistic) predictive/optimisation techniques compared to intelligent tools in renewable energy systems. This is achieved through applying intelligent tools such as Neural Networks and Particle Swarm Optimisation for different aspects that govern system design and operation as well as solar irradiance prediction. Results indicate the importance of device level transients, temporal resolution of available solar irradiance and type of external load profile (static or time-varying) as system performance is affected differently. In this regard, minute resolved simulations are utilised to account for all component transients including predicting the key input to the system, namely available solar resource which can be affected by various climatic conditions such as rainfall. System behaviour is (generally) more accurately predicted utilising Neural Network solar irradiance prediction compared to the ASHRAE clear sky model when benchmarked against measured irradiance data. Allowing Particle Swarm Optimisation (PSO) to further adjust specific control set-points within the systems PMS results in improvements in system operational characteristics compared to using simplistic rule-based design methods. In such systems, increasing energy storage capacities generally allow for more renewable energy penetration yet only affect the operational characteristics up to a threshold capacity. Additionally, simultaneously optimising system size and PMS to satisfy a multi-objective function, consisting of total Net Present Cost and CO2 emissions, yielded lower costs and carbon emissions compared to HOMER, a widely adopted sizing software tool. Further development of this thesis will allow further improvements in the development of renewably powered energy systems providing clean, reliable, cost-effective energy. All simulations are performed on a desktop PC having an Intel i3 processor using either MATLAB/Simulink or HOMER

Designing energy-efficient computing systems using equalization and machine learning

As technology scaling slows down in the nanometer CMOS regime and mobile computing becomes more ubiquitous, designing energy-efficient hardware for mobile systems is becoming increasingly critical and challenging. Although various approaches like near-threshold computing (NTC), aggressive voltage scaling with shadow latches, etc. have been proposed to get the most out of limited battery life, there is still no “silver bullet” to increasing power-performance demands of the mobile systems. Moreover, given that a mobile system could operate in a variety of environmental conditions, like different temperatures, have varying performance requirements, etc., there is a growing need for designing tunable/reconfigurable systems in order to achieve energy-efficient operation. In this work we propose to address the energy- efficiency problem of mobile systems using two different approaches: circuit tunability and distributed adaptive algorithms. Inspired by the communication systems, we developed feedback equalization based digital logic that changes the threshold of its gates based on the input pattern. We showed that feedback equalization in static complementary CMOS logic enabled up to 20% reduction in energy dissipation while maintaining the performance metrics. We also achieved 30% reduction in energy dissipation for pass-transistor digital logic (PTL) with equalization while maintaining performance. In addition, we proposed a mechanism that leverages feedback equalization techniques to achieve near optimal operation of static complementary CMOS logic blocks over the entire voltage range from near threshold supply voltage to nominal supply voltage. Using energy-delay product (EDP) as a metric we analyzed the use of the feedback equalizer as part of various sequential computational blocks. Our analysis shows that for near-threshold voltage operation, when equalization was used, we can improve the operating frequency by up to 30%, while the energy increase was less than 15%, with an overall EDP reduction of ≈10%. We also observe an EDP reduction of close to 5% across entire above-threshold voltage range. On the distributed adaptive algorithm front, we explored energy-efficient hardware implementation of machine learning algorithms. We proposed an adaptive classifier that leverages the wide variability in data complexity to enable energy-efficient data classification operations for mobile systems. Our approach takes advantage of varying classification hardness across data to dynamically allocate resources and improve energy efficiency. On average, our adaptive classifier is ≈100× more energy efficient but has ≈1% higher error rate than a complex radial basis function classifier and is ≈10× less energy efficient but has ≈40% lower error rate than a simple linear classifier across a wide range of classification data sets. We also developed a field of groves (FoG) implementation of random forests (RF) that achieves an accuracy comparable to Convolutional Neural Networks (CNN) and Support Vector Machines (SVM) under tight energy budgets. The FoG architecture takes advantage of the fact that in random forests a small portion of the weak classifiers (decision trees) might be sufficient to achieve high statistical performance. By dividing the random forest into smaller forests (Groves), and conditionally executing the rest of the forest, FoG is able to achieve much higher energy efficiency levels for comparable error rates. We also take advantage of the distributed nature of the FoG to achieve high level of parallelism. Our evaluation shows that at maximum achievable accuracies FoG consumes ≈1.48×, ≈24×, ≈2.5×, and ≈34.7× lower energy per classification compared to conventional RF, SVM-RBF , Multi-Layer Perceptron Network (MLP), and CNN, respectively. FoG is 6.5× less energy efficient than SVM-LR, but achieves 18% higher accuracy on average across all considered datasets