1,679,117 research outputs found
PERTS: A Prototyping Environment for Real-Time Systems
PERTS is a prototyping environment for real-time systems. It is being built incrementally and will contain basic building blocks of operating systems for time-critical applications, tools, and performance models for the analysis, evaluation and measurement of real-time systems and a simulation/emulation environment. It is designed to support the use and evaluation of new design approaches, experimentations with alternative system building blocks, and the analysis and performance profiling of prototype real-time systems
Architecting Time-Critical Big-Data Systems
Current infrastructures for developing big-data applications are able to process –via big-data analytics- huge amounts of data, using clusters of machines that collaborate to perform parallel computations. However, current infrastructures were not designed to work with the requirements of time-critical applications; they are more focused on general-purpose applications rather than time-critical ones. Addressing this issue from the perspective of the real-time systems community, this paper considers time-critical big-data. It deals with the definition of a time-critical big-data system from the point of view of requirements, analyzing the specific characteristics of some popular big-data applications. This analysis is complemented by the challenges stemmed from the infrastructures that support the applications, proposing an architecture and offering initial performance patterns that connect application costs with infrastructure performance
Application of queueing models to multiprogrammed computer systems operating in a time-critical environment
A model of a central processor (CPU) which services background applications in the presence of time critical activity is presented. The CPU is viewed as an M/M/1 queueing system subject to periodic interrupts by deterministic, time critical process. The Laplace transform of the distribution of service times for the background applications is developed. The use of state of the art queueing models for studying the background processing capability of time critical computer systems is discussed and the results of a model validation study which support this application of queueing models are presented
Validation of highly reliable, real-time knowledge-based systems
Knowledge-based systems have the potential to greatly increase the capabilities of future aircraft and spacecraft and to significantly reduce support manpower needed for the space station and other space missions. However, a credible validation methodology must be developed before knowledge-based systems can be used for life- or mission-critical applications. Experience with conventional software has shown that the use of good software engineering techniques and static analysis tools can greatly reduce the time needed for testing and simulation of a system. Since exhaustive testing is infeasible, reliability must be built into the software during the design and implementation phases. Unfortunately, many of the software engineering techniques and tools used for conventional software are of little use in the development of knowledge-based systems. Therefore, research at Langley is focused on developing a set of guidelines, methods, and prototype validation tools for building highly reliable, knowledge-based systems. The use of a comprehensive methodology for building highly reliable, knowledge-based systems should significantly decrease the time needed for testing and simulation. A proven record of delivering reliable systems at the beginning of the highly visible testing and simulation phases is crucial to the acceptance of knowledge-based systems in critical applications
AXI Lite redundant on-chip bus interconnect for high reliability systems
Nowadays, system-on-chips have become critical since they support more and more safe applications due to their flexibility. However, they are susceptible to single-event upsets because the memory cell size has significantly shrunk. This article presents a triple redundant on-chip interconnect bus that provides low-speed peripherals with high reliability. In addition to correcting single errors and detecting duplicated ones, the proposed circuit offers zero latency and is transparent for both the embedded processor and the peripherals. These characteristics make it suitable for hard real-time applications. At the same time, the impact on area and power consumption is minimal
Do We Run Large-scale Multi-Robot Systems on the Edge? More Evidence for Two-Phase Performance in System Size Scaling
With increasing numbers of mobile robots arriving in real-world applications,
more robots coexist in the same space, interact, and possibly collaborate.
Methods to provide such systems with system size scalability are known, for
example, from swarm robotics. Example strategies are self-organizing behavior,
a strict decentralized approach, and limiting the robot-robot communication.
Despite applying such strategies, any multi-robot system breaks above a certain
critical system size (i.e., number of robots) as too many robots share a
resource (e.g., space, communication channel). We provide additional evidence
based on simulations, that at these critical system sizes, the system
performance separates into two phases: nearly optimal and minimal performance.
We speculate that in real-world applications that are configured for optimal
system size, the supposedly high-performing system may actually live on
borrowed time as it is on a transient to breakdown. We provide two modeling
options (based on queueing theory and a population model) that may help to
support this reasoning.Comment: Submitted to the 2024 IEEE International Conference on Robotics and
Automation (ICRA 2024
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