Green on-chip inductors in three-dimensional integrated circuits

This thesis focuses on the technique for the improvement of quality factor and inductance of the TSV inductors and then on the utilization of TSV inductors in various on-chip applications such as DC-DC converter and resonant clocking. Through-silicon-vias (TSVs) are the enabling technique for three-dimensional integrated circuits (3D ICs). However, their large area significantly reduces the benefits that can be obtained by 3D ICs. On the other hand, a major limiting factor for the implementation of many on-chip circuits such as DC-DC converters and resonant clocking is the large area overhead induced by spiral inductors. Several works have been proposed in the literature to make inductors out of idle TSVs. In this thesis, the technique to improve the quality factor and inductance is proposed and then discusses about two applications utilizing TSV inductors i.e., inductive DC-DC converters and LC resonant clocking. The TSV inductor performs inferior to spiral inductors due to its increases losses. Hence to improve the performance of the TSV inductor, the losses should be reduced. Inductive DC-DC converters become prominent for on-chip voltage conversion because of their high efficiency compared with other types of converters (e.g. linear and capacitive converters). On the other hand, to reduce on-chip power, LC resonant clocking has become an attractive option due to its same amplitude and phases compared to other resonant clocking methods such as standing wave and rotary wave. A major challenge for both applications is associated with the required inductor area. In this thesis, the effectiveness of such TSV inductors in addressing both challenges are demonstrated --Abstract, page iv

Ku band rotary traveling-wave voltage controlled oscillator

Voltage-controlled oscillator (VCO) plays a key role in determination of the link budget of wireless communication, and consequently the performance of the transceiver. Lowering the noise contribution from the VCO to the entire system is always challenging and remains the active research area. Motivated by high demands for the low-phase noise, low-power consumption VCO in the application of 5G, radar-sensing system, implantable device, to name a few, this research focused on the design of a rotary travelling-wave oscillator (RTWO). A power conscious RTWO with reliable direction control of the wave propagation was investigated. The phase noise was analyzed based on the proposed RTWO. The phase noise reduction technique was introduced by using tail current source filtering technique in which a figure-8 inductors were employed. Three RTWO were implemented based on GF 130 nm standard CMOS process and TSMC 130 nm standard CMOS process. The first design was achieving 16-GHz frequency with power consumption of 5.8-mW with 190.3 dBc/Hz FoM at 1 MHz offset. The second and third design were operating at 14-GHz with a power consumption range of 13-18.4mW and 14.6-20.5mW, respectively. The one with filtering technique achieved FoM of 184.8 dBc/Hz at 1 MHz whereas the one without inudctor filtering obtained FoM of 180.8 dBc/Hz at 1 MHz offset based on simulation

Low Power Resonant Rotary Global Clock Distribution Network Design

Along with the increasing complexity of the modern very large scale integrated (VLSI) circuit design, the power consumption of the clock distribution network in digital integrated circuits is continuously increasing. In terms of power and clock skew, the resonant clock distribution network has been studied as a promising alternative to the conventional clock distribution network. Resonant clock distribution network, which works based on adiabatic switching principles, provides a complete solution for on-chip clock generation and distribution for low-power and low-skew clock network designs for high-performance synchronous VLSI circuits.This dissertation work aims to develop the global clock distribution network for one kind of resonant clocking technologies: The resonant rotary clocking technology. The following critical aspects are addressed in this work: (1) A novel rotary oscillator array (ROA) topology is proposed to solve the signal rotation direction uniformity problem, in order to support the design of resonant rotary clocking based low-skew clock distribution network; (2) A synchronization scheme is proposed to solve the large scale rotary clocking generation circuit synchronization problem; (3) A low-skew rotary clock distribution network design methodology is proposed with frequency, power and skew optimizations; (4) A resonant rotary clocking based physical design flow is proposed, which can be integrated in the current mainstream IC design flow; (5) A dynamic rotary frequency divider is proposed for dynamic frequency scaling applications. Experimental and theoretical results show: (1) The efficiency of the proposed methodology in the construction of low-skew, low-power resonant rotary clock distribution network. (2) The effectiveness of the dynamic rotary frequency divider in extending the operating frequency range of the low-power resonant rotary based applications.Ph.D., Electrical Engineering -- Drexel University, 201

Ring-Based Resonant Standing Wave Oscillators for 3D Clocking Applications

Ring-based resonant standing wave oscillators have been shown to be a useful clocking tech-nique that can distribute and generate a high frequency, low skew, low power, and stable clock signal. By using through-silicon-vias, this type of standing wave oscillator can be used to gener-ate the clocking scheme for 3D integrated circuits. In this thesis, we propose the use of such 3D standing wave oscillators and show how independent 3D oscillators in different stacks can syn-chronize through the use of a redistribution layer stub. Inter-chip clock synchronization is then accomplished without the need for a PLL. In addition, we propose the first 3D ring-based resonant standing wave oscillator bootstrap and reset circuit to initialize and stop oscillation. Using a 3D ring-based resonant standing wave oscillator, we propose a ring-based data fabric for 3D stacked DRAM and compare the results with existing approaches such as High Bandwidth Memory (HBM) or Wide I/O memory. We show that our Memory Architecture using a Ring-based Scheme (MARS) can provide the increases in speed necessary to overcome current memory bottlenecks, and can scale effectively as future 3D stacks become larger. Our MARS can trade off power, throughput, and latency to match different application requirements. By using a narrow bus, and connecting it to all channels, the MARS8 can provide an alternative memory configuration with ∼ 6.9× lower power consumption than HBM, and ∼ 2.7× faster speeds than Wide I/O. Using multiple ring topologies in the same stack, the channel count can double from 8 to 16, and then to 32. This is possible since MARS uses about 4× fewer TSVs per channel than HBM or Wide I/O. This provides speeds up to ∼ 4.2× faster than traditional HBM. This scalable architecture allows higher throughput and faster system performance for next-generation DRAM. The MARS topology proposed in this thesis can be used in a variety of computing systems, from lightweight IoT to large-scale data centers

Power Reduction Techniques in Clock Distribution Networks with Emphasis on LC Resonant Clocking

In this thesis we propose a set of independent techniques in the overall concept of LC resonant clocking where each technique reduces power consumption and improve system performance. Low-power design is becoming a crucial design objective due to the growing demand on portable applications and the increasing difficulties in cooling and heat removal. The clock distribution network delivers the clock signal which acts as a reference to all sequential elements in the synchronous system. The clock distribution network consumes a considerable amount of power in synchronous digital systems. Resonant clocking is an emerging promising technique to reduce the power of the clock network. The inductor used in resonant clocking enables the conversion of the electric energy stored on the clock capacitance to magnetic energy in the inductor and vice versa. In this thesis, the concept of the slack in the clock skew has been extended for an LC fully-resonant clock distribution network. This extra slack in comparison to standard clock distribution networks can be used to reduce routing complexity, achieve reduction in wire elongation, total wire length, and power consumption. Simulation results illustrate that by utilizing the proposed approach, an average reduction of 53% in the number of wire elongations and 11% reduction in total wire length can be achieved. A dual-edge clocking scheme introduced in the literature to enable the operation of the flip-flop at the rising- and falling edges of the clock has been modified. The interval by which the charging elements in the flip-flop are being switched-on was reduced causing a reduction in power consumption. Simulating the flip-flop in STMicroelectronics 90-nm technology shows correct functionality of the Sense Amplifier flip-flop with a resonant clock signal of 500 MHz and a throughput of 1 GHz under process, voltage, and temperature (PVT) variations. Modeling the resonant system with the proposed flip-flop illustrates that dual-edge compared to single-edge triggering can achieve up to 58% reduction in power consumption when the clock capacitance is the dominating factor. The application of low-swing clocking to LC resonant clock distribution network has been investigated on-chip. The proposed low-swing resonant clocking scheme operates with one voltage supply and does not require an additional supply voltage. The Differential Conditional Capturing flip-flop introduced in the literature was modified to operate with a low-swing sinusoidal clock. Low-swing resonant clocking achieved around 5.8% reduction in total power with 5.7% area overhead. Modeling the clock network with the proposed flip-flop illustrates that low-swing clocking can achieve up to 58% reduction in the power consumption of the resonant clock. An analytical approach was introduced to estimate the required driver strength in the clock generator. Using the proposed approach early in the design stage reduces area and power overhead by eliminating the need for programmable switches in the driving circuit

Silicon-Based Terahertz Circuits and Systems

The Terahertz frequency range, often referred to as the `Terahertz' gap, lies wedged between microwave at the lower end and infrared at the higher end of the spectrum, occupying frequencies between 0.3-3.0 THz. For a long time, applications in THz frequencies had been limited to astronomy and chemical sciences, but with advancement in THz technology in recent years, it has shown great promise in a wide range of applications ranging from disease diagnostics, non-invasive early skin cancer detection, label-free DNA sequencing to security screening for concealed weapons and contraband detection, global environmental monitoring, nondestructive quality control and ultra-fast wireless communication. Up until recently, the terahertz frequency range has been mostly addressed by high mobility compound III-V processes, expensive nonlinear optics, or cryogenically cooled quantum cascade lasers. A low cost, room temperature alternative can enable the development of such a wide array of applications, not currently accessible due to cost and size limitations. In this thesis, we will discuss our approach towards development of integrated terahertz technology in silicon-based processes. In the spirit of academic research, we will address frequencies close to 0.3 THz as 'Terahertz'. In this thesis, we address both fronts of integrated THz systems in silicon: THz power generation, radiation and transmitter systems, and THz signal detection and receiver systems. THz power generation in silicon-based integrated circuit technology is challenging due to lower carrier mobility, lower cut-o frequencies compared to compound III-V processes, lower breakdown voltages and lossy passives. Radiation from silicon chip is also challenging due to lossy substrates and high dielectric constant of silicon. In this work, we propose novel ways of combining circuit and electromagnetic techniques in a holistic design approach, which can overcome limitations of conventional block-by-block or partitioned design methodology, in order to generate high-frequency signals above the classical definition of cut-off frequencies (ƒt/ƒmax). We demonstrate this design philosophy in an active electromagnetic structure, which we call Distributed Active Radiator. It is inspired by an Inverse Maxwellian approach, where instead of using classical circuit and electromagnetic blocks to generate and radiate THz frequencies, we formulate surface (metal) currents in silicon chip for a desired THz field prole and develop active means of controlling different harmonic currents to perform signal generation, frequency multiplication, radiation and lossless filtering, simultaneously in a compact footprint. By removing the articial boundaries between circuits, electromagnetics and antenna, we open ourselves to a broader design space. This enabled us to demonstrate the rst 1 mW Eective-isotropic-radiated-power(EIRP) THz (0.29 THz) source in CMOS with total radiated power being three orders of magnitude more than previously demonstrated. We also proposed a near-field synchronization mechanism, which is a scalable method of realizing large arrays of synchronized autonomous radiating sources in silicon. We also demonstrate the first THz CMOS array with digitally controlled beam-scanning in 2D space with radiated output EIRP of nearly 10 mW at 0.28 THz. On the receiver side, we use a similar electronics and electromagnetics co-design approach to realize a 4x4 pixel integrated silicon Terahertz camera demonstrating to the best of our knowledge, the most sensitive silicon THz detector array without using post-processing, silicon lens or high-resistivity substrate options (NEP &lt; 10 pW &#8730; Hz at 0.26 THz). We put the 16 pixel silicon THz camera together with the CMOS DAR THz power generation arrays and demonstrated, for the first time, an all silicon THz imaging system with a CMOS source.</p

Thermomechanical and mechanical characterization of a 3-axial MEMS gyroscope

Työn tavoitteena oli automaattisten, tehokkaiden ja edullisten testauslaitteistojen ja -menetelmien kehittäminen kolmiakselisten mikroelektromekaanisten (MEMS) gyroskooppien mekaaniseen ja termomekaaniseen karakterisointiin. Työn painotuksena oli testausmenetelmien ja -laitteistojen kehittäminen ja gyroskooppien vaurioanalyysit jäävät tämän työn ulkopuolelle. Gyroskooppi on kulmanopeuden mittaamiseen ja asennon aistimiseen käytettävä anturi. Mekaaninen karakteristointi kattaa gyroskooppien korkean G-arvon iskumaiset kuormitukset ja tärinäkuormitukset. Lämpömekaaninen karakterisointi kattaa gyroskooppien ympäristöolojen kontrolloimista lämpö-, kosteus- tai monikaasu -kaapissa. Tässä työssä kehitettiin menetelmä kolmiakselisten MEMS-gyroskooppien karakterisointiin lämpö- ja kosteuskaapissa. Menetelmä koostuu yksiakselisesta servomoottorista, servo-ohjaimesta ja ohjaussovelluksesta, jonka avulla voidaan samanaikaisesti mitata ja tallentaa gyroskooppien kulmanopeus kaikilta kolmelta (X, Y ja Z) akselilta sekä mitata ympäristön lämpötilaa. Korkean G-arvon iskumaisiin kuormituksiin tarkoitettu laitteisto koostuu pneumaattisesta iskutestauslaitteesta, jossa käytetään mekaanista iskua korkean G-arvon saavuttamiseen. Olemassa olevaa laitteistoa muutettiin siten että sillä voidaan saavuttaa suurempia G-arvoja (aina 80 000G:hen asti) ja mahdollistaa gyroskooppien tutkiminen eri asennoissa. Tärinäkuormituslaittesto koostuu signaaligeneraattorista ja täristinmoottorista, joka soveltuu gyroskooppien tärinätestaukseen. Signaaligeneraattoria käytetään eri taajuisten signaalimuotojen syöttämiseen täristinmoottorille, joka tärisee annetun syötteen mukaisesti. Pyörityslaitteen toiminnallisuutta testattiin yhdellä gyroskoopilla huoneenlämmössä. Gyroskoopin X, Y ja Z-akselien kulmanopeuksien keskiarvot sekä -hajonta mitattiin. Korkean g-arvon iskutestauslaitteistoa testattiin kuudella mittauksella, jossa gyroskoopit rikkoutuivat ensimmäisellä iskulla. Tärinätestauslaitteistoa testattiin yhdellä gyroskooppi-piirilevyllä. Gyroskooppi-piirilevyn päälle asetettiin kiihtyvyysanturi, jolla mitattiin tärinästä aiheutuvan kiihtyvyyden RMS-arvo, huippuarvo ja kokonaisenergia. Tulevat jatkotutkimukset keskittyvät pyöritys-, isku- ja tärinälaitteistoilla testattujen MEMS-gyroskooppien vaurioanalyysiin.The purpose of this thesis was to develop automated, efficient and economical methods for the mechanical and thermomechanical characterization of a digital 3-axial microelectromechanical systems (MEMS) gyroscope. The development of the test equipment and methods was the emphasis of this thesis, but the failure analyses of MEMS gyroscopes are beyond the scope of this work. A gyroscope is a device for measuring angular velocity and sensing change in orientation around its X, Y and Z-axis. The experimental part is divided into two sections, of which the first one is focused on high-G shock impact and vibration loading and the second on thermomechanical characterization. A rotation device was developed for the characterization of the MEMS gyroscopes in a temperature and humidity chamber. The rotation device consists of a oneaxial servo-motor, a servo-drive and a control program for the readout of angular velocity. The device is capable of simultaneously recording the angular velocities of the gyroscopes from all three axes while rotating the gyroscopes around a single axis. The device also records the temperature of the environment. The high-G shock impact equipment consists of a pneumatically assisted shock tester that relies on mechanical impact to generate the high-G shock pulse. An existing mechanical shock impact system was modified to gain higher G-values (up to 80 000G) and to enable the inspection of gyroscopes in different orientations. The vibration test equipment consists of a waveform generator and a vibration shaker, for the vibration testing of gyroscopes. The waveform generator is capable of outputting different waveforms with different frequencies to the shaker that vibrates with the given output. The functionality of the rotation device was tested with rotating one gyroscope board at room temperature. Respective averages and standard deviations of angular velocities were measured in the direction of X, Y and Z axes. The functionality of the high-G shock impact test equipment was verified with six measurements where all of the gyroscopes failed on first impact. The vibration test equipment was tested with one gyroscope board. Root mean square (RMS), peak value and total energy of acceleration were measured with an accelerometer placed on top of the vibrating gyroscope board

Applied Measurement Systems

Measurement is a multidisciplinary experimental science. Measurement systems synergistically blend science, engineering and statistical methods to provide fundamental data for research, design and development, control of processes and operations, and facilitate safe and economic performance of systems. In recent years, measuring techniques have expanded rapidly and gained maturity, through extensive research activities and hardware advancements. With individual chapters authored by eminent professionals in their respective topics, Applied Measurement Systems attempts to provide a comprehensive presentation and in-depth guidance on some of the key applied and advanced topics in measurements for scientists, engineers and educators

Design, fabrication, characterization and reliability study of CMOS-MEMS Lorentz-Force magnetometers

Tesi en modalitat de compendi de publicacionsToday, the most common form of mass-production semiconductor device fabrication is Complementary Metal-Oxide Semiconductor (CMOS) technology. The dedicated Integrated Circuit (IC) interfaces of commercial sensors are manufactured using this technology. The sensing elements are generally implemented using Micro-Electro-Mechanical-Systems (MEMS), which need to be manufactured using specialized micro-machining processes. Finally, the CMOS circuitry and the MEMS should ideally be combined in a single package. For some applications, integration of CMOS electronics and MEMS devices on a single chip (CMOS-MEMS) has the potential of reducing fabrication costs, size, parasitics and power consumption, compared to other integration approaches. Remarkably, a CMOS-MEMS device may be built with the back-end-of-line (BEOL) layers of the CMOS process. But, despite its advantages, this particular approach has proven to be very challenging given the current lack of commercial products in the market. The main objective of this Thesis is to prove that a high-performance MEMS, sealed and packaged in a standard package, may be accurately modeled and manufactured using the BEOL layers of a CMOS process in a reliable way. To attain this, the first highly reliable novel CMOS-MEMS Lorentz Force Magnetometer (LFM) was successfully designed, modeled, manufactured, characterized and subjected to several reliability tests, obtaining a comparable or superior performance to the typical solid-state magnetometers used in current smartphones. A novel technique to avoid magnetic offsets, the main drawback of LFMs, was presented and its performance confirmed experimentally. Initially, the issues encountered in the manufacturing process of MEMS using the BEOL layers of the CMOS process were discouraging. Vapor HF release of MEMS structures using the BEOL of CMOS wafers resulted in undesirable damaging effects that may lead to the conclusion that this manufacturing approach is not feasible. However, design techniques and workarounds for dealing with the observed issues were devised, tested and implemented in the design of the LFM presented in this Thesis, showing a clear path to successfully fabricate different MEMS devices using the BEOL.Hoy en día, la forma más común de producción en masa es una tecnología llamada Complementary Metal-Oxide Semiconductor (CMOS). La interfaz de los circuitos integrados (IC) de sensores comerciales se fabrica usando, precisamente, esta tecnología. Actualmente es común que los sensores se implementen usando Sistemas Micro-Electro-Mecánicos (MEMS), que necesitan ser fabricados usando procesos especiales de micro-mecanizado. En un último paso, la circuitería CMOS y el MEMS se combinan en un único elemento, llamado package. En algunas aplicaciones, la integración de la electrónica CMOS y los dispositivos MEMS en un único chip (CMOS-MEMS) alberga el potencial de reducir los costes de fabricación, el tamaño, los parásitos y el consumo, al compararla con otras formas de integración. Resulta notable que un dispositivo CMOS-MEMS pueda ser construido con las capas del back-end-of-line (BEOL) de un proceso CMOS. Pero, a pesar de sus ventajas, este enfoque ha demostrado ser un gran desafío como demuestra la falta de productos comerciales en el mercado. El objetivo principal de esta Tesis es probar que un MEMS de altas prestaciones, sellado y empaquetado en un encapsulado estándar, puede ser correctamente modelado y fabricado de una manera fiable usando las capas del BEOL de un proceso CMOS. Para probar esto mismo, el primer magnetómetro CMOS-MEMS de fuerza de Lorentz (LFM) fue exitosamente diseñado, modelado, fabricado, caracterizado y sometido a varias pruebas de fiabilidad, obteniendo un rendimiento comparable o superior al de los típicos magnetómetros de estado sólido, los cuales son usados en móviles actuales. Cabe destacar que en esta Tesis se presenta una novedosa técnica con la que se evitan offsets magnéticos, el mayor inconveniente de los magnetómetros de fuerza Lorentz. Su efectividad fue confirmada experimentalmente. En los inicios, los problemas asociados al proceso de fabricación de MEMS usando las capas BEOL de obleas CMOS resultaba desalentador. Liberar estructuras MEMS hechas con obleas CMOS con vapor de HF producía efectos no deseados que bien podrían llevar a la conclusión de que este enfoque de fabricación no es viable. Sin embargo, se idearon y probaron técnicas de diseño especiales y soluciones ad-hoc para contrarrestar estos efectos no deseados. Se implementaron en el diseño del magnetómetro de Lorentz presentado en esta Tesis, arrojando excelentes resultados, lo cual despeja el camino hacia la fabricación de diferentes dispositivos MEMS usando las capas BEOL.Postprint (published version

Devices and structures utilizing aerosol jet printing : UV photodetectors, transmission lines and ring resonators

The market for printed electronics is growing continuously. Its low-cost fabrication process, large-area scalability and short processing time makes it interesting for researchers, even though the performance is lower as compared to conventional electronics. Popular printing technologies such as screen printing and inkjet printing are well established, but the upcoming maskless meso-scaled aerosol printing technique promises unique advantages. It allows the direct printing of finer 2D-3D structures, using a wide range of materials with viscosity between 1-1000 cP, while resolving the exhaustive problem of nozzle clogging. However, the implementation of printed electronics in consumer electronics remains a challenge, as device performance has to be improved. New techniques such as aerosol jet printing require additional research to fulfill their promise. This thesis investigates the implementation of fully printed structures using aerosol jet printing, focusing on devices in the fields of optoelectronics and semiconductor packaging. The system components and operation mechanism of the aerosol jet printing system are described and a methodology for process optimization is proposed. Four distinctive regions for process optimization are identified: ink selection, surface treatment, process control and postprocessing. In the preliminary work, the possibilities of the aerosol jet printing process control is explored, such as achievable line width, film thickness, material compatibility and sintering possibilities. Test structures are produced in order to test the fabrication workflow, and to observe the interaction and compatibility of multiple printed layers. The challenges associated with aerosol jet printing are identified, including wetting, alignment, overspray and satellite deposition. A fully printed ultraviolet photodetector with a nanoporous morphology is investigated. Presynthesized Zinc Oxide crystals are printed to reduce the post-annealing temperature. At a temperature of < 150 ◦C, the solvent is evaporated, resulting in a porous structure having high surface area-to-volume ratio. A fully printed photodetector that has comparable performance to the state-of-the-art is demonstrated, while the low-temperature fabrication process maintains compatibility with large area flexible plastic substrates. Next, a fully printed microstrip transmission line with SU-8 as dielectric and silver as conductor is proposed, which can provide high-bandwidth interconnections in packaged semiconductor dies. The metal and dielectric materials are characterized at microwave frequencies upto 18 GHz. It is shown that a good correspondence is reached between the simulated design parameters and the printed structure, which results in good characteristic impedance matching and low transmission losses. The transition of the printed transmission line to a microwave integrated circuit is demonstrated, thereby validating the concept of aerosol jet printed transmission lines inside the package. Lastly, the SU-8 based printed transmission lines are extended into microwave ring resonators, with applications in high frequency sensing. It is envisioned to directly print these structures inside the package, directly connected to a microwave integrated amplifier for high-Q sensing. Therefore, these ring resonator are designed for microwave center frequencies ranging from 15.5 to 21.5 GHz for reduced size which can be integrated inside a package. The material characterization of metal and dielectric materials are carried out up to 26 GHz. The simulated results showed good correspondence with the measured results in terms of center-frequency, insertion loss and Q-factor