2,970 research outputs found

    Measuring and Managing Answer Quality for Online Data-Intensive Services

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    Online data-intensive services parallelize query execution across distributed software components. Interactive response time is a priority, so online query executions return answers without waiting for slow running components to finish. However, data from these slow components could lead to better answers. We propose Ubora, an approach to measure the effect of slow running components on the quality of answers. Ubora randomly samples online queries and executes them twice. The first execution elides data from slow components and provides fast online answers; the second execution waits for all components to complete. Ubora uses memoization to speed up mature executions by replaying network messages exchanged between components. Our systems-level implementation works for a wide range of platforms, including Hadoop/Yarn, Apache Lucene, the EasyRec Recommendation Engine, and the OpenEphyra question answering system. Ubora computes answer quality much faster than competing approaches that do not use memoization. With Ubora, we show that answer quality can and should be used to guide online admission control. Our adaptive controller processed 37% more queries than a competing controller guided by the rate of timeouts.Comment: Technical Repor

    Hardware-efficient on-line learning through pipelined truncated-error backpropagation in binary-state networks

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    Artificial neural networks (ANNs) trained using backpropagation are powerful learning architectures that have achieved state-of-the-art performance in various benchmarks. Significant effort has been devoted to developing custom silicon devices to accelerate inference in ANNs. Accelerating the training phase, however, has attracted relatively little attention. In this paper, we describe a hardware-efficient on-line learning technique for feedforward multi-layer ANNs that is based on pipelined backpropagation. Learning is performed in parallel with inference in the forward pass, removing the need for an explicit backward pass and requiring no extra weight lookup. By using binary state variables in the feedforward network and ternary errors in truncated-error backpropagation, the need for any multiplications in the forward and backward passes is removed, and memory requirements for the pipelining are drastically reduced. Further reduction in addition operations owing to the sparsity in the forward neural and backpropagating error signal paths contributes to highly efficient hardware implementation. For proof-of-concept validation, we demonstrate on-line learning of MNIST handwritten digit classification on a Spartan 6 FPGA interfacing with an external 1Gb DDR2 DRAM, that shows small degradation in test error performance compared to an equivalently sized binary ANN trained off-line using standard back-propagation and exact errors. Our results highlight an attractive synergy between pipelined backpropagation and binary-state networks in substantially reducing computation and memory requirements, making pipelined on-line learning practical in deep networks.Comment: Now also consider 0/1 binary activations. Memory access statistics reporte

    A novel parallel algorithm for surface editing and its FPGA implementation

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    A thesis submitted to the University of Bedfordshire in partial fulfilment of the requirements for the degree of Doctor of PhilosophySurface modelling and editing is one of important subjects in computer graphics. Decades of research in computer graphics has been carried out on both low-level, hardware-related algorithms and high-level, abstract software. Success of computer graphics has been seen in many application areas, such as multimedia, visualisation, virtual reality and the Internet. However, the hardware realisation of OpenGL architecture based on FPGA (field programmable gate array) is beyond the scope of most of computer graphics researches. It is an uncultivated research area where the OpenGL pipeline, from hardware through the whole embedded system (ES) up to applications, is implemented in an FPGA chip. This research proposes a hybrid approach to investigating both software and hardware methods. It aims at bridging the gap between methods of software and hardware, and enhancing the overall performance for computer graphics. It consists of four parts, the construction of an FPGA-based ES, Mesa-OpenGL implementation for FPGA-based ESs, parallel processing, and a novel algorithm for surface modelling and editing. The FPGA-based ES is built up. In addition to the Nios II soft processor and DDR SDRAM memory, it consists of the LCD display device, frame buffers, video pipeline, and algorithm-specified module to support the graphics processing. Since there is no implementation of OpenGL ES available for FPGA-based ESs, a specific OpenGL implementation based on Mesa is carried out. Because of the limited FPGA resources, the implementation adopts the fixed-point arithmetic, which can offer faster computing and lower storage than the floating point arithmetic, and the accuracy satisfying the needs of 3D rendering. Moreover, the implementation includes Bézier-spline curve and surface algorithms to support surface modelling and editing. The pipelined parallelism and co-processors are used to accelerate graphics processing in this research. These two parallelism methods extend the traditional computation parallelism in fine-grained parallel tasks in the FPGA-base ESs. The novel algorithm for surface modelling and editing, called Progressive and Mixing Algorithm (PAMA), is proposed and implemented on FPGA-based ES’s. Compared with two main surface editing methods, subdivision and deformation, the PAMA can eliminate the large storage requirement and computing cost of intermediated processes. With four independent shape parameters, the PAMA can be used to model and edit freely the shape of an open or closed surface that keeps globally the zero-order geometric continuity. The PAMA can be applied independently not only FPGA-based ESs but also other platforms. With the parallel processing, small size, and low costs of computing, storage and power, the FPGA-based ES provides an effective hybrid solution to surface modelling and editing

    Shortcuts to Adiabaticity Assisted by Counterdiabatic Born-Oppenheimer Dynamics

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    Shortcuts to adiabaticity (STA) provide control protocols to guide the dynamics of a quantum system through an adiabatic reference trajectory in an arbitrary prescheduled time. Designing STA proves challenging in complex quantum systems when the dynamics of the degrees of freedom span different time scales. We introduce Counterdiabatic Born-Oppenheimer Dynamics (CBOD) as a framework to design STA in systems with a large separation of energy scales. CBOD exploits the Born-Oppenheimer approximation to separate the Hamiltonian into effective fast and slow degrees of freedom and calculate the corresponding counterdiabatic drivings for each subsystem. We show the validity of the CBOD technique via an example of coupled harmonic oscillators, which can be solved exactly for comparison, and further apply it to a system of two-charged particles.Comment: 14 pages, 3 figures, published New Journal of Physic

    Innovative Solutions for Navigation and Mission Management of Unmanned Aircraft Systems

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    The last decades have witnessed a significant increase in Unmanned Aircraft Systems (UAS) of all shapes and sizes. UAS are finding many new applications in supporting several human activities, offering solutions to many dirty, dull, and dangerous missions, carried out by military and civilian users. However, limited access to the airspace is the principal barrier to the realization of the full potential that can be derived from UAS capabilities. The aim of this thesis is to support the safe integration of UAS operations, taking into account both the user's requirements and flight regulations. The main technical and operational issues, considered among the principal inhibitors to the integration and wide-spread acceptance of UAS, are identified and two solutions for safe UAS operations are proposed: A. Improving navigation performance of UAS by exploiting low-cost sensors. To enhance the performance of the low-cost and light-weight integrated navigation system based on Global Navigation Satellite System (GNSS) and Micro Electro-Mechanical Systems (MEMS) inertial sensors, an efficient calibration method for MEMS inertial sensors is required. Two solutions are proposed: 1) The innovative Thermal Compensated Zero Velocity Update (TCZUPT) filter, which embeds the compensation of thermal effect on bias in the filter itself and uses Back-Propagation Neural Networks to build the calibration function. Experimental results show that the TCZUPT filter is faster than the traditional ZUPT filter in mapping significant bias variations and presents better performance in the overall testing period. Moreover, no calibration pre-processing stage is required to keep measurement drift under control, improving the accuracy, reliability, and maintainability of the processing software; 2) A redundant configuration of consumer grade inertial sensors to obtain a self-calibration of typical inertial sensors biases. The result is a significant reduction of uncertainty in attitude determination. In conclusion, both methods improve dead-reckoning performance for handling intermittent GNSS coverage. B. Proposing novel solutions for mission management to support the Unmanned Traffic Management (UTM) system in monitoring and coordinating the operations of a large number of UAS. Two solutions are proposed: 1) A trajectory prediction tool for small UAS, based on Learning Vector Quantization (LVQ) Neural Networks. By exploiting flight data collected when the UAS executes a pre-assigned flight path, the tool is able to predict the time taken to fly generic trajectory elements. Moreover, being self-adaptive in constructing a mathematical model, LVQ Neural Networks allow creating different models for the different UAS types in several environmental conditions; 2) A software tool aimed at supporting standardized procedures for decision-making process to identify UAS/payload configurations suitable for any type of mission that can be authorized standing flight regulations. The proposed methods improve the management and safe operation of large-scale UAS missions, speeding up the flight authorization process by the UTM system and supporting the increasing level of autonomy in UAS operations
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