Modeling Mixed-critical Systems in Real-time BIP

International audienceThe proliferation of multi- and manycores creates an important design problem: the design and verification for mixed-criticality constraints in timing and safety, taking into account the resource sharing and hardware faults. In our work, we aim to contribute towards the solution of these problems by using a formal design language - the real time BIP, to model both hardware and software, functionality and scheduling. In this paper we present the initial experiments of modeling mixed-criticality systems in BIP

사이버-물리 시스템을 위한 기능적/시간적 정확성 보장 시뮬레이션 기법

학위논문 (박사)-- 서울대학교 대학원 공과대학 전기·컴퓨터공학부, 2017. 8. 이창건.When developing a Cyber-Physical System (CPS), simulators are commonly used to predict the final performance of the system at the design phase. However, current simulation tools do not consider timing behaviors of the cyber-system such as varying execution times and task preemptions. Thus, their control performance predictions are far different from the real performance, and this leads to enormous time and cost for a system development, because multiple re-design and re-implementation phases are required, until an acceptable system configuration is determined. Motivated by this limitation, this dissertation proposes functionally and temporally correct simulation for the cyber-side of a CPS. The key idea of the proposed approach is to keep the data and time correctness only at the physical interaction points to maximally enjoy the freedom of scheduling simulated jobs. For this, we transform the simulation problem to a real-time job scheduling problem with precedence constraints necessary for the functional and temporal correctness. Then, we propose an efficient scheduling algorithm for the functionally and temporally correct real-time simulation. The proposed approach significantly improves the real-time simulation capacity of the state-of-the-art simulation methods while keeping the functional and temporal correctness. Our evaluation through both synthetic workload and actual implementation confirms both high accuracy and high efficiency of our approach compared with other state-of-the-art methods.1 Introduction 1 1.1 Motivation and Objective 1 1.2 Approach 3 1.3 Contributions 8 1.4 Organization 8 2 Related Work 10 2.1 Design and Verification of Cyber-Physical Systems 10 2.2 Verification Approaches 12 2.2.1 Model-Based Simulations 12 2.2.2 Cycle-Accurate Simulations and Host-Compiled Simulations 14 2.2.3 Real-Time Execution Platforms 15 2.2.4 Distributed Simulations 16 2.3 Job Scheduling Approaches 17 3 System Model and Problem Description 22 3.1 Description on the real cyber-system 23 3.2 Description on the simulated cyber-system 27 3.3 Formal definition of the simulation problem 28 4 Real-Time Simulation for Deterministic Cyber-Systems 31 4.1 Introduction 31 4.2 Construction of Offline Guider 31 4.3 Online Progressive Scheduling of Simulated Jobs 34 4.4 Evaluation 38 5 Real-Time Simulation for Non-Deterministic Cyber-Systems 45 5.1 Introduction 45 5.2 Overview of Approach 45 5.3 Construction of Offline Guider 50 5.4 Online Progressive Scheduling of Simulated Jobs 63 5.5 Evaluation 74 5.5.1 Evaluation Using Synthesized Cyber-Systems 78 5.5.2 Implementation 86 6 Practical Discussions 95 6.1 Data Exchange Delay 95 6.2 Simulation Overhead 97 6.2.1Offline Overhead 97 6.2.2 Online Overhead 100 6.3 Other Useful Features 100 7 Extension for Multicore Simulation PC 102 8 Conclusion 108 8.1 Summary 108 8.2 Future Work 108 References 110Docto

Dynamic power management: from portable devices to high performance computing

Electronic applications are nowadays converging under the umbrella of the cloud computing vision. The future ecosystem of information and communication technology is going to integrate clouds of portable clients and embedded devices exchanging information, through the internet layer, with processing clusters of servers, data-centers and high performance computing systems. Even thus the whole society is waiting to embrace this revolution, there is a backside of the story. Portable devices require battery to work far from the power plugs and their storage capacity does not scale as the increasing power requirement does. At the other end processing clusters, such as data-centers and server farms, are build upon the integration of thousands multiprocessors. For each of them during the last decade the technology scaling has produced a dramatic increase in power density with significant spatial and temporal variability. This leads to power and temperature hot-spots, which may cause non-uniform ageing and accelerated chip failure. Nonetheless all the heat removed from the silicon translates in high cooling costs. Moreover trend in ICT carbon footprint shows that run-time power consumption of the all spectrum of devices accounts for a significant slice of entire world carbon emissions. This thesis work embrace the full ICT ecosystem and dynamic power consumption concerns by describing a set of new and promising system levels resource management techniques to reduce the power consumption and related issues for two corner cases: Mobile Devices and High Performance Computing

Simulating Execution Time and Power Consumption of Real-Time Tasks on Embedded Platforms

In this paper, we present PARTSim, an open-source power/thermal-aware simulator for embedded real-time systems. This tool is a fork of the well-known RTSim simulator, which can simulate the timing behavior of a set of real-time tasks with various characteristics when running on a multi-processor platform in presence of a number of real-time scheduling policies. PARTSim extends the functionality of RTSim by introducing support for power-aware embedded platforms exhibiting frequency scaling and specific architectural patterns like the ARM big.LITTLE and DynamIQ ones. Experimental results that compare simulated data against execution profiles collected on real platforms show a simulation error under 10 % for both execution time and power consumption at 90th percentile when simulating the effects of DVFS

Hardware Acceleration Using Functional Languages

Cílem této práce je prozkoumat možnosti využití funkcionálního paradigmatu pro hardwarovou akceleraci, konkrétně pro datově paralelní úlohy. Úroveň abstrakce tradičních jazyků pro popis hardwaru, jako VHDL a Verilog, přestáví stačit. Pro popis na algoritmické či behaviorální úrovni se rozmáhají jazyky původně navržené pro vývoj softwaru a modelování, jako C/C++, SystemC nebo MATLAB. Funkcionální jazyky se s těmi imperativními nemůžou měřit v rozšířenosti a oblíbenosti mezi programátory, přesto je předčí v mnoha vlastnostech, např. ve verifikovatelnosti, schopnosti zachytit inherentní paralelismus a v kompaktnosti kódu. Pro akceleraci datově paralelních výpočtů se často používají jednotky FPGA, grafické karty (GPU) a vícejádrové procesory. Praktická část této práce rozšiřuje existující knihovnu Accelerate pro počítání na grafických kartách o výstup do VHDL. Accelerate je možno chápat jako doménově specifický jazyk vestavěný do Haskellu s backendem pro prostředí NVIDIA CUDA. Rozšíření pro vysokoúrovňovou syntézu obvodů ve VHDL představené v této práci používá stejný jazyk a frontend.The aim of this thesis is to research how the functional paradigm can be used for hardware acceleration with an emphasis on data-parallel tasks. The level of abstraction of the traditional hardware description languages, such as VHDL or Verilog, is becoming to low. High-level languages from the domains of software development and modeling, such as C/C++, SystemC or MATLAB, are experiencing a boom for hardware description on the algorithmic or behavioral level. Functional Languages are not so commonly used, but they outperform imperative languages in verification, the ability to capture inherent paralellism and the compactness of code. Data-parallel task are often accelerated on FPGAs, GPUs and multicore processors. In this thesis, we use a library for general-purpose GPU programs called Accelerate and extend it to produce VHDL. Accelerate is a domain-specific language embedded into Haskell with a backend for the NVIDIA CUDA platform. We use the language and its frontend, and create a new backend for high-level synthesis of circuits in VHDL.

Dynamic Thermal and Power Management: From Computers to Buildings

Thermal and power management have become increasingly important for both computing and physical systems. Computing systems from real-time embedded systems to data centers require effective thermal and power management to prevent overheating and save energy. In the mean time, as a major consumer of energy buildings face challenges to reduce the energy consumption for air conditioning while maintaining comfort of occupants. In this dissertation we investigate dynamic thermal and power management for computer systems and buildings. (1) We present thermal control under utilization bound (TCUB), a novel control-theoretic thermal management algorithm designed for single core real-time embedded systems. A salient feature of TCUB is to maintain both desired processor temperature and real-time performance. (2) To address unique challenges posed by multicore processors, we develop the real-time multicore thermal control (RT-MTC) algorithm. RT-MTC employs a feedback control loop to enforce the desired temperature and CPU utilization of the multicore platform via dynamic frequency and voltage scaling. (3) We research dynamic thermal management for real-time services running on server clusters. We develop the control-theoretic thermal balancing (CTB) to dynamically balance temperature of servers via distributing clients\u27 service requests to servers. Next, (4) we propose CloudPowerCap, a power cap management system for virtualized cloud computing infrastructure. The novelty of CloudPowerCap lies in an integrated approach to coordinate power budget management and resource management in a cloud computing environment. Finally we expand our research to physical environment by exploring several fundamental problems of thermal and power management on buildings. We analyze spatial and temporal data acquired from an real-world auditorium instrumented by a multi-modal sensor network. We propose a data mining technique to determine the appropriate number and location of temperature sensors for estimating the spatiotemporal temperature distribution of the auditorium. Furthermore, we explore the potential energy savings that can be achieved through occupancy-based HVAC scheduling based on real occupancy data of the auditorium

Interactive Parallelization of Embedded Real-Time Applications Starting from Open-Source Scilab & Xcos

International audienceIn this paper, we introduce the workflow of interactive parallelization for optimizing embedded real-time applications for multicore architectures. In our approach, the real-time applications are written in the Scilab high-level mathematical & scientific programming language or with a Scilab Xcos block-diagram ap-proach. By using code generation and code parallelization technol-ogy combined with an interactive GUI, the end user can map appli-cations to the multicore processor iteratively. The approach is eval-uated on two use cases: (1) an image processing application written in Scilab and (2) an avionic system modeled in Xcos. Using the workflow, an end-to-end model-based approach targeting multicore processors is enabled resulting in a significant reduction in devel-opment effort and high application speedup. The workflow de-scribed in this paper is developed and tested within the EU-funded ARGO project focused on WCET-Aware Parallelization of Model-Based Applications for Heterogeneous Parallel Systems