Scalable on-chip multiplexing of silicon single and double quantum dots

The scalability of the quantum processor technology is elemental factor in reaching fault-tolerant quantum computing. Owing to the maturity of microelectronics, quantum bits (qubits) realized with spins in silicon quantum dots are considered among the most promising technologies for building scalable quantum computers. However, several challenges need to be solved to realize quantum-dot-based quantum processors. In this respect, ultra-low-power on-chip cryogenic classical complementary metal oxide semiconductor (CMOS) electronics for control, read-out, and interfacing of the qubits is an important milestone. We report scalable interfacing of tunable electron and hole quantum dots embedded in a 64-channel cryogenic multiplexer, which has less-than-detectable static power dissipation. Our integrated hybrid quantum-dot CMOS technology provides a plausible route to scalable interfacing of a large number of quantum dot devices, enabling variability analysis and quantum dot qubit geometry optimization, which are prerequisites for building large-scale silicon-based quantum computers. We analyze charge noise and obtain state-of-the-art addition energies and gate lever arms in electron and hole quantum dots. The demonstrated electrostatically-defined quantum dots and cryogenic transistors with sharp turning-on transfer characteristics, made by harnessing a CMOS process that utilizes a conventional doped-Poly-Si/SiO2/Si MOS stack, constitute a promising platform for spin qubits monolithically integrated with cryo-CMOS electronics.Comment: revised manuscrip

Improving mobility of silicon metal-oxide-semiconductor devices for quantum dots by high vacuum activation annealing

To improve mobility of fabricated silicon metal-oxide-semiconductor (MOS) quantum devices, forming gas annealing is a common method used to mitigate the effects of disorder at the Si/SiO2 interface. However, the importance of activation annealing is usually ignored. Here, we show that a high vacuum environment for implantation activation is beneficial for improving mobility compared to nitrogen atmosphere. Low-temperature transport measurements of Hall bars show that peak mobility can be improved by a factor of two, reaching 1.5 m^2/(Vs) using high vacuum annealing during implantation activation. Moreover, the charge stability diagram of a single quantum dot is mapped, with no visible disturbance caused by disorder, suggesting possibility of fabricating high-quality quantum dots on commercial wafers. Our results may provide valuable insights into device optimization in silicon-based quantum computing.Comment: 13 pages, 4 figure

An addressable quantum dot qubit with fault-tolerant control fidelity

Exciting progress towards spin-based quantum computing has recently been made with qubits realized using nitrogen-vacancy (N-V) centers in diamond and phosphorus atoms in silicon, including the demonstration of long coherence times made possible by the presence of spin-free isotopes of carbon and silicon. However, despite promising single-atom nanotechnologies, there remain substantial challenges in coupling such qubits and addressing them individually. Conversely, lithographically defined quantum dots have an exchange coupling that can be precisely engineered, but strong coupling to noise has severely limited their dephasing times and control fidelities. Here we combine the best aspects of both spin qubit schemes and demonstrate a gate-addressable quantum dot qubit in isotopically engineered silicon with a control fidelity of 99.6%, obtained via Clifford based randomized benchmarking and consistent with that required for fault-tolerant quantum computing. This qubit has orders of magnitude improved coherence times compared with other quantum dot qubits, with T_2* = 120 mus and T_2 = 28 ms. By gate-voltage tuning of the electron g*-factor, we can Stark shift the electron spin resonance (ESR) frequency by more than 3000 times the 2.4 kHz ESR linewidth, providing a direct path to large-scale arrays of addressable high-fidelity qubits that are compatible with existing manufacturing technologies

Spin Electronics and Spin Computation

We review several proposed spintronic devices that can provide new functionality or improve available functions of electronic devices. In particular, we discuss a high mobility field effect spin transistor, an all-metal spin transistor, and our recent proposal of an all-semiconductor spin transistor and a spin battery. We also address some key issues in spin-polarized transport, which are relevant to the feasibility and operation of hybrid semiconductor devices. Finally, we discuss a more radical aspect of spintronic research--the spin-based quantum computation and quantum information processing.Comment: 17 pages, 3 figure