A Bayesian Search for Transcriptional Motifs

Identifying transcription factor (TF) binding sites (TFBSs) is an important step towards understanding transcriptional regulation. A common approach is to use gaplessly aligned, experimentally supported TFBSs for a particular TF, and algorithmically search for more occurrences of the same TFBSs. The largest publicly available databases of TF binding specificities contain models which are represented as position weight matrices (PWM). There are other methods using more sophisticated representations, but these have more limited databases, or aren't publicly available. Therefore, this paper focuses on methods that search using one PWM per TF. An algorithm, MATCHTM, for identifying TFBSs corresponding to a particular PWM is available, but is not based on a rigorous statistical model of TF binding, making it difficult to interpret or adjust the parameters and output of the algorithm. Furthermore, there is no public description of the algorithm sufficient to exactly reproduce it. Another algorithm, MAST, computes a p-value for the presence of a TFBS using true probabilities of finding each base at each offset from that position. We developed a statistical model, BaSeTraM, for the binding of TFs to TFBSs, taking into account random variation in the base present at each position within a TFBS. Treating the counts in the matrices and the sequences of sites as random variables, we combine this TFBS composition model with a background model to obtain a Bayesian classifier. We implemented our classifier in a package (SBaSeTraM). We tested SBaSeTraM against a MATCHTM implementation by searching all probes used in an experimental Saccharomyces cerevisiae TF binding dataset, and comparing our predictions to the data. We found no statistically significant differences in sensitivity between the algorithms (at fixed selectivity), indicating that SBaSeTraM's performance is at least comparable to the leading currently available algorithm. Our software is freely available at: http://wiki.github.com/A1kmm/sbasetram/building-the-tools

Fast Linear Programming through Transprecision Computing on Small and Sparse Data

A plethora of program analysis and optimization techniques rely on linear programming at their heart. However, such techniques are often considered too slow for production use. While today’s best solvers are optimized for complex problems with thousands of dimensions, linear programming, as used in compilers, is typically applied to small and seemingly trivial problems, but to many instances in a single compilation run. As a result, compilers do not benefit from decades of research on optimizing large-scale linear programming. We design a simplex solver targeted at compilers. A novel theory of transprecision computation applied from individual elements to full data-structures provides the computational foundation. By carefully combining it with optimized representations for small and sparse matrices and specialized small-coefficient algorithms, we (1) reduce memory traffic, (2) exploit wide vectors, and (3) use low-precision arithmetic units effectively. We evaluate our work by embedding our solver into a state-of-the-art integer set library and implement one essential operation, coalescing, on top of our transprecision solver. Our evaluation shows more than an order-of-magnitude speedup on the core simplex pivot operation and a mean speedup of 3.2x (vs. GMP) and 4.6x (vs. IMath) for the optimized coalescing operation. Our results demonstrate that our optimizations exploit the wide SIMD instructions of modern microarchitectures effectively. We expect our work to provide foundations for a future integer set library that uses transprecision arithmetic to accelerate compiler analyses.ISSN:2475-142

Hardware-assisted instruction profiling and latency detection

Debugging and profiling tools can alter the execution flow or timing, can induce heisenbugs and are thus marginally useful for debugging time critical systems. Software tracing, however advanced it may be, depends on consuming precious computing resources. In this study, the authors analyse state-of-the-art hardware-tracing support, as provided in modern Intel processors and propose a new technique which uses the processor hardware for tracing without any code instrumentation or tracepoints. They demonstrate the utility of their approach with contributions in three areas - syscall latency profiling, instruction profiling and software-tracer impact detection. They present improvements in performance and the granularity of data gathered with hardware-assisted approach, as compared with traditional software only tracing and profiling. The performance impact on the target system – measured as time overhead – is on average 2–3%, with the worst case being 22%. They also define a way to measure and quantify the time resolution provided by hardware tracers for trace events, and observe the effect of finetuning hardware tracing for optimum utilisation. As compared with other in-kernel tracers, they observed that hardware-based tracing has a much reduced overhead, while achieving greater precision. Moreover, the other tracing techniques are ineffective in certain tracing scenarios

Détection d'intrusion sur les objets connectés par analyse comportementale

Alors que la course à l’innovation des fabricants d’objets connectés s’accélère, de plus en plus d’attaques informatiques impliquant de tels objets, ou même les ciblant, sévissent. Ainsi, des campagnes de déni de service distribué comme celle de Mirai ont mis à mal des infrastructures informatiques gigantesques. En outre, le nombre de vulnérabilités découvertes dans l’écosystème des objets connectés ne cesse de grandir. La sécurité physique des utilisateurs d’objet connectés peut également être menacée par l’insécurité de ces plateformes. Dans le même temps, les solutions de sécurité proposées sont souvent spécifiques à un des nombreux protocoles de communication utilisés par les objets intelligents, ou s’appuient sur les caractéristiques matérielles et logicielles d’un type d’objet. De plus, peu de constructeurs permettent des mises à jour des micrologiciels de ces objets, augmentant ainsi les menaces contre les usagers de tels objets. Dans ce contexte, il devient nécessaire de fournir des solutions de sécurité applicables à l’ensemble des objets proposés sur le marché. Cela nécessite de parvenir à collecter de l’information de manière efficace sur l’ensemble de ces systèmes et de réaliser une analyse automatique qui ne dépend pas de l’objet surveillé. Ainsi, différentes solutions ont été proposées, se basant essentiellement sur les informations réseau provenant des objets à surveiller, mais peu d’approches se basent sur le comportement même de l’objet. En conséquence, nous proposons dans ce mémoire une solution de détection d’intrusion se basant sur les anomalies des objets surveillés. Les différents outils que nous avons développés permettent de collecter des informations relatives au comportement des objets surveillés de manière efficace et à différents niveaux, comme le mode usager ou directement dans le noyau du système d’exploitation. Pour ce faire, nous nous appuyons sur des techniques performantes de traçage. L’envoi des traces générées ainsi que leur traitement produira un jeu de données qui sera labellisé automatiquement. Ensuite, différents algorithmes d’apprentissage automatique permettront de détecter les anomalies sur le système de manière automatique et totalement indépendante du type d’objet surveillé. Notre solution introduit très peu de baisse de performance sur les objets connectés surveillés, et montre d’excellents résultats pour détecter divers types d’attaques qui ont été implémentées durant les travaux de recherche. Différents algorithmes ont été étudiés, et les techniques à base d’arbre ont montré des résultats bien plus élevés que des réseaux de neurones profonds. De plus, les outils développés pendant ce projet de recherche permettent d’utiliser les librairies les plus populaires d’apprentissage automatique sur des traces au format CTF, ouvrant ainsi la voie à la prédiction de performance d’un système ou à des analyses de traces plus automatiques et puissantes.----------ABSTRACT: While vendors are creating more and more connected devices, the rate of cyberattacks involving or targeting such devices keeps increasing. For instance, some massive distributed denial of services campaigns such as Mirai used poorly secured devices to shut down popular services on the Internet for many hours or IoT malware like Brickerbot are regularly launched. The insecurity of smart devices create many threats for the users, and vulnerabilities on devices are disclosed every day, while only little vendors let their devices being updated. Meanwhile, proposed security solutions often failed at being compatible with all the devices, because of the numerous protocols used in the Internet of Things or the heterogeneity of firmware used in such devices. This explains why it has become essential to creating a security solution for smart devices that are not specific to the kind of device. The first step to being able to protect a device is being able to detect an intrusion on it. This requires to collect data effectively from the monitored system to launch automated analysis that is not specific to the device. While several solutions matching those criteria have been proposed, most of them studied the network activity of the device, and only little focus on the device behavior. As a consequence, we developed a solution using a device behavior to detect intrusion on it. We obtained very high detection performances with several attacks that have been implemented. Furthermore, we studied various classification algorithm to highlight that tree-based algorithm performed more than the other techniques, including recurrent deep neural network, with the data we collected effectively with tracing techniques. Moreover, we obtained very little overhead on the monitored device because of the architecture we developed. Finally, our tools also enable users to use traces in CTF binary format to feed the most popular Python machine learning libraries thanks to a whole toolchain of processing data

A Contribution to Resource-Aware Architectures for Humanoid Robots

The goal of this work is to provide building blocks for resource-aware robot architectures. The topic of these blocks are data-driven generation of context-sensitive resource models, prediction of future resource utilizations, and resource-aware computer vision and motion planning algorithms. The implementation of these algorithms is based on resource-aware concepts and methodologies originating from the Transregional Collaborative Research Center "Invasive Computing" (SFB/TR 89)